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comparison docs/TableGen/BackEnds.rst @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents 54457678186b
children 803732b1fca8
comparison
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101:34baf5011add 120:1172e4bd9c6f
64 The macros will be undef'd automatically as they're used, in the include file. 64 The macros will be undef'd automatically as they're used, in the include file.
65 65
66 On all LLVM back-ends, the ``llvm-tblgen`` binary will be executed on the root 66 On all LLVM back-ends, the ``llvm-tblgen`` binary will be executed on the root
67 TableGen file ``<Target>.td``, which should include all others. This guarantees 67 TableGen file ``<Target>.td``, which should include all others. This guarantees
68 that all information needed is accessible, and that no duplication is needed 68 that all information needed is accessible, and that no duplication is needed
69 in the TbleGen files. 69 in the TableGen files.
70 70
71 CodeEmitter 71 CodeEmitter
72 ----------- 72 -----------
73 73
74 **Purpose**: CodeEmitterGen uses the descriptions of instructions and their fields to 74 **Purpose**: CodeEmitterGen uses the descriptions of instructions and their fields to
98 --------- 98 ---------
99 99
100 **Purpose**: This tablegen backend is responsible for emitting a description of the target 100 **Purpose**: This tablegen backend is responsible for emitting a description of the target
101 instruction set for the code generator. (what are the differences from CodeEmitter?) 101 instruction set for the code generator. (what are the differences from CodeEmitter?)
102 102
103 **Output**: C++ code with enums and structures representing the register mappings, 103 **Output**: C++ code with enums and structures representing the instruction mappings,
104 properties, masks, etc. 104 properties, masks, etc.
105 105
106 **Usage**: Both on ``<Target>BaseInstrInfo`` and ``<Target>MCTargetDesc`` (headers 106 **Usage**: Both on ``<Target>BaseInstrInfo`` and ``<Target>MCTargetDesc`` (headers
107 and source files) with macros defining in which they are for declaration vs. 107 and source files) with macros defining in which they are for declaration vs.
108 initialization issues.
108 109
109 AsmWriter 110 AsmWriter
110 --------- 111 ---------
111 112
112 **Purpose**: Emits an assembly printer for the current target. 113 **Purpose**: Emits an assembly printer for the current target.
144 PseudoLowering 145 PseudoLowering
145 -------------- 146 --------------
146 147
147 **Purpose**: Generate pseudo instruction lowering. 148 **Purpose**: Generate pseudo instruction lowering.
148 149
149 **Output**: Implements ``ARMAsmPrinter::emitPseudoExpansionLowering()``. 150 **Output**: Implements ``<Target>AsmPrinter::emitPseudoExpansionLowering()``.
150 151
151 **Usage**: Included directly into ``<Target>AsmPrinter.cpp``. 152 **Usage**: Included directly into ``<Target>AsmPrinter.cpp``.
152 153
153 CallingConv 154 CallingConv
154 ----------- 155 -----------
158 159
159 **Output**: Implement static functions to deal with calling conventions 160 **Output**: Implement static functions to deal with calling conventions
160 chained by matching styles, returning false on no match. 161 chained by matching styles, returning false on no match.
161 162
162 **Usage**: Used in ISelLowering and FastIsel as function pointers to 163 **Usage**: Used in ISelLowering and FastIsel as function pointers to
163 implementation returned by a CC sellection function. 164 implementation returned by a CC selection function.
164 165
165 DAGISel 166 DAGISel
166 ------- 167 -------
167 168
168 **Purpose**: Generate a DAG instruction selector. 169 **Purpose**: Generate a DAG instruction selector.