comparison lib/Target/Mips/Mips32r6InstrFormats.td @ 120:1172e4bd9c6f

update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children c2174574ed3a
comparison
equal deleted inserted replaced
101:34baf5011add 120:1172e4bd9c6f
43 //===----------------------------------------------------------------------===// 43 //===----------------------------------------------------------------------===//
44 44
45 class OPGROUP<bits<6> Val> { 45 class OPGROUP<bits<6> Val> {
46 bits<6> Value = Val; 46 bits<6> Value = Val;
47 } 47 }
48 def OPGROUP_COP0 : OPGROUP<0b010000>;
48 def OPGROUP_COP1 : OPGROUP<0b010001>; 49 def OPGROUP_COP1 : OPGROUP<0b010001>;
49 def OPGROUP_COP2 : OPGROUP<0b010010>; 50 def OPGROUP_COP2 : OPGROUP<0b010010>;
50 def OPGROUP_ADDI : OPGROUP<0b001000>; 51 def OPGROUP_ADDI : OPGROUP<0b001000>;
51 def OPGROUP_AUI : OPGROUP<0b001111>; 52 def OPGROUP_AUI : OPGROUP<0b001111>;
52 def OPGROUP_BLEZ : OPGROUP<0b000110>; 53 def OPGROUP_BLEZ : OPGROUP<0b000110>;
199 let Inst{25-21} = 0b00000; 200 let Inst{25-21} = 0b00000;
200 let Inst{20-16} = OPCODE5_BGEZAL.Value; 201 let Inst{20-16} = OPCODE5_BGEZAL.Value;
201 let Inst{15-0} = offset; 202 let Inst{15-0} = offset;
202 } 203 }
203 204
205 class COP0_EVP_DVP_FM<bits<1> sc> : MipsR6Inst {
206 bits<5> rt;
207
208 bits<32> Inst;
209
210 let Inst{31-26} = OPGROUP_COP0.Value;
211 let Inst{25-21} = 0b01011;
212 let Inst{20-16} = rt;
213 let Inst{15-11} = 0b00000;
214 let Inst{10-6} = 0b00000;
215 let Inst{5} = sc;
216 let Inst{4-3} = 0b00;
217 let Inst{2-0} = 0b100;
218 }
219
204 class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst { 220 class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
205 bits<5> fs; 221 bits<5> fs;
206 bits<5> fd; 222 bits<5> fd;
207 223
208 bits<32> Inst; 224 bits<32> Inst;
358 let Inst{25-6} = code_; 374 let Inst{25-6} = code_;
359 let Inst{5-0} = OPCODE6_SDBBP.Value; 375 let Inst{5-0} = OPCODE6_SDBBP.Value;
360 } 376 }
361 377
362 // This class is ambiguous with other branches: 378 // This class is ambiguous with other branches:
363 // BEQC/BNEC require that rs > rt 379 // BEQC/BNEC require that rs < rt && rs != 0
364 class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst { 380 class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst {
365 bits<5> rs; 381 bits<5> rs;
366 bits<5> rt; 382 bits<5> rt;
367 bits<16> offset; 383 bits<16> offset;
368 384