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comparison test/CodeGen/AMDGPU/fneg-fabs.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents 7d135dc70f03
children 803732b1fca8
comparison
equal deleted inserted replaced
101:34baf5011add 120:1172e4bd9c6f
1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s 3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
4 4
5 ; FUNC-LABEL: {{^}}fneg_fabs_fadd_f32: 5 ; FUNC-LABEL: {{^}}fneg_fabs_fadd_f32:
6 ; SI-NOT: and 6 ; SI-NOT: and
7 ; SI: v_sub_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, |{{v[0-9]+}}| 7 ; SI: v_subrev_f32_e64 {{v[0-9]+}}, |{{v[0-9]+}}|, {{s[0-9]+}}
8 define void @fneg_fabs_fadd_f32(float addrspace(1)* %out, float %x, float %y) { 8 define void @fneg_fabs_fadd_f32(float addrspace(1)* %out, float %x, float %y) {
9 %fabs = call float @llvm.fabs.f32(float %x) 9 %fabs = call float @llvm.fabs.f32(float %x)
10 %fsub = fsub float -0.000000e+00, %fabs 10 %fsub = fsub float -0.000000e+00, %fabs
11 %fadd = fadd float %y, %fsub 11 %fadd = fadd float %y, %fsub
12 store float %fadd, float addrspace(1)* %out, align 4 12 store float %fadd, float addrspace(1)* %out, align 4
13 ret void 13 ret void
14 } 14 }
15 15
16 ; FUNC-LABEL: {{^}}fneg_fabs_fmul_f32: 16 ; FUNC-LABEL: {{^}}fneg_fabs_fmul_f32:
17 ; SI-NOT: and 17 ; SI-NOT: and
18 ; SI: v_mul_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, -|{{v[0-9]+}}| 18 ; SI: v_mul_f32_e64 {{v[0-9]+}}, -|{{v[0-9]+}}|, {{s[0-9]+}}
19 ; SI-NOT: and 19 ; SI-NOT: and
20 define void @fneg_fabs_fmul_f32(float addrspace(1)* %out, float %x, float %y) { 20 define void @fneg_fabs_fmul_f32(float addrspace(1)* %out, float %x, float %y) {
21 %fabs = call float @llvm.fabs.f32(float %x) 21 %fabs = call float @llvm.fabs.f32(float %x)
22 %fsub = fsub float -0.000000e+00, %fabs 22 %fsub = fsub float -0.000000e+00, %fabs
23 %fmul = fmul float %y, %fsub 23 %fmul = fmul float %y, %fsub
80 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 80 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
81 ; R600: -PV 81 ; R600: -PV
82 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 82 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
83 ; R600: -PV 83 ; R600: -PV
84 84
85 ; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}} 85 ; FIXME: In this case two uses of the constant should be folded
86 ; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}} 86 ; SI: s_brev_b32 [[SIGNBITK:s[0-9]+]], 1{{$}}
87 ; SI: v_or_b32_e32 v{{[0-9]+}}, [[SIGNBITK]], v{{[0-9]+}}
88 ; SI: v_or_b32_e32 v{{[0-9]+}}, [[SIGNBITK]], v{{[0-9]+}}
87 define void @fneg_fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) { 89 define void @fneg_fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
88 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in) 90 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
89 %fsub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %fabs 91 %fsub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %fabs
90 store <2 x float> %fsub, <2 x float> addrspace(1)* %out 92 store <2 x float> %fsub, <2 x float> addrspace(1)* %out
91 ret void 93 ret void
92 } 94 }
93 95
94 ; FUNC-LABEL: {{^}}fneg_fabs_v4f32: 96 ; FUNC-LABEL: {{^}}fneg_fabs_v4f32:
95 ; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}} 97 ; SI: s_brev_b32 [[SIGNBITK:s[0-9]+]], 1{{$}}
96 ; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}} 98 ; SI: v_or_b32_e32 v{{[0-9]+}}, [[SIGNBITK]], v{{[0-9]+}}
97 ; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}} 99 ; SI: v_or_b32_e32 v{{[0-9]+}}, [[SIGNBITK]], v{{[0-9]+}}
98 ; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}} 100 ; SI: v_or_b32_e32 v{{[0-9]+}}, [[SIGNBITK]], v{{[0-9]+}}
101 ; SI: v_or_b32_e32 v{{[0-9]+}}, [[SIGNBITK]], v{{[0-9]+}}
99 define void @fneg_fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) { 102 define void @fneg_fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
100 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in) 103 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
101 %fsub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %fabs 104 %fsub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %fabs
102 store <4 x float> %fsub, <4 x float> addrspace(1)* %out 105 store <4 x float> %fsub, <4 x float> addrspace(1)* %out
103 ret void 106 ret void