Mercurial > hg > CbC > CbC_llvm
comparison test/CodeGen/X86/sse1.ll @ 120:1172e4bd9c6f
update 4.0.0
author | mir3636 |
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date | Fri, 25 Nov 2016 19:14:25 +0900 |
parents | 60c9769439b8 |
children | 803732b1fca8 |
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101:34baf5011add | 120:1172e4bd9c6f |
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1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | |
1 ; Tests for SSE1 and below, without SSE2+. | 2 ; Tests for SSE1 and below, without SSE2+. |
2 ; RUN: llc < %s -mtriple=i386-unknown-unknown -march=x86 -mcpu=pentium3 -O3 | FileCheck %s | 3 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3 -O3 | FileCheck %s --check-prefix=X32 |
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mattr=-sse2,+sse -O3 | FileCheck %s | 4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,+sse -O3 | FileCheck %s --check-prefix=X64 |
4 | 5 |
5 ; PR7993 | 6 ; PR7993 |
6 ;define <4 x i32> @test3(<4 x i16> %a) nounwind { | 7 ;define <4 x i32> @test3(<4 x i16> %a) nounwind { |
7 ; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1] | 8 ; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1] |
8 ; ret <4 x i32> %c | 9 ; ret <4 x i32> %c |
10 | 11 |
11 ; This should not emit shuffles to populate the top 2 elements of the 4-element | 12 ; This should not emit shuffles to populate the top 2 elements of the 4-element |
12 ; vector that this ends up returning. | 13 ; vector that this ends up returning. |
13 ; rdar://8368414 | 14 ; rdar://8368414 |
14 define <2 x float> @test4(<2 x float> %A, <2 x float> %B) nounwind { | 15 define <2 x float> @test4(<2 x float> %A, <2 x float> %B) nounwind { |
15 ; CHECK-LABEL: test4: | 16 ; X32-LABEL: test4: |
16 ; CHECK: # BB#0: # %entry | 17 ; X32: # BB#0: # %entry |
17 ; CHECK-NEXT: movaps %xmm0, %xmm2 | 18 ; X32-NEXT: movaps %xmm0, %xmm2 |
18 ; CHECK-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3] | 19 ; X32-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3] |
19 ; CHECK-NEXT: addss %xmm1, %xmm0 | 20 ; X32-NEXT: addss %xmm1, %xmm0 |
20 ; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3] | 21 ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3] |
21 ; CHECK-NEXT: subss %xmm1, %xmm2 | 22 ; X32-NEXT: subss %xmm1, %xmm2 |
22 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] | 23 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] |
23 ; CHECK-NEXT: ret | 24 ; X32-NEXT: retl |
25 ; | |
26 ; X64-LABEL: test4: | |
27 ; X64: # BB#0: # %entry | |
28 ; X64-NEXT: movaps %xmm0, %xmm2 | |
29 ; X64-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3] | |
30 ; X64-NEXT: addss %xmm1, %xmm0 | |
31 ; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3] | |
32 ; X64-NEXT: subss %xmm1, %xmm2 | |
33 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] | |
34 ; X64-NEXT: retq | |
24 entry: | 35 entry: |
25 %tmp7 = extractelement <2 x float> %A, i32 0 | 36 %tmp7 = extractelement <2 x float> %A, i32 0 |
26 %tmp5 = extractelement <2 x float> %A, i32 1 | 37 %tmp5 = extractelement <2 x float> %A, i32 1 |
27 %tmp3 = extractelement <2 x float> %B, i32 0 | 38 %tmp3 = extractelement <2 x float> %B, i32 0 |
28 %tmp1 = extractelement <2 x float> %B, i32 1 | 39 %tmp1 = extractelement <2 x float> %B, i32 1 |
38 ; is not. We used to ping pong between splitting the vselect for the v4i | 49 ; is not. We used to ping pong between splitting the vselect for the v4i |
39 ; condition operand and widening the resulting vselect for the v4f32 result. | 50 ; condition operand and widening the resulting vselect for the v4f32 result. |
40 ; PR18036 | 51 ; PR18036 |
41 | 52 |
42 define <4 x float> @vselect(<4 x float>*%p, <4 x i32> %q) { | 53 define <4 x float> @vselect(<4 x float>*%p, <4 x i32> %q) { |
43 ; CHECK-LABEL: vselect: | 54 ; X32-LABEL: vselect: |
44 ; CHECK: ret | 55 ; X32: # BB#0: # %entry |
56 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp) | |
57 ; X32-NEXT: xorps %xmm0, %xmm0 | |
58 ; X32-NEXT: je .LBB1_1 | |
59 ; X32-NEXT: # BB#2: # %entry | |
60 ; X32-NEXT: xorps %xmm1, %xmm1 | |
61 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp) | |
62 ; X32-NEXT: jne .LBB1_5 | |
63 ; X32-NEXT: jmp .LBB1_4 | |
64 ; X32-NEXT: .LBB1_1: | |
65 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero | |
66 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp) | |
67 ; X32-NEXT: je .LBB1_4 | |
68 ; X32-NEXT: .LBB1_5: # %entry | |
69 ; X32-NEXT: xorps %xmm2, %xmm2 | |
70 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp) | |
71 ; X32-NEXT: jne .LBB1_8 | |
72 ; X32-NEXT: jmp .LBB1_7 | |
73 ; X32-NEXT: .LBB1_4: | |
74 ; X32-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero | |
75 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp) | |
76 ; X32-NEXT: je .LBB1_7 | |
77 ; X32-NEXT: .LBB1_8: # %entry | |
78 ; X32-NEXT: xorps %xmm3, %xmm3 | |
79 ; X32-NEXT: jmp .LBB1_9 | |
80 ; X32-NEXT: .LBB1_7: | |
81 ; X32-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero | |
82 ; X32-NEXT: .LBB1_9: # %entry | |
83 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp) | |
84 ; X32-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] | |
85 ; X32-NEXT: jne .LBB1_11 | |
86 ; X32-NEXT: # BB#10: | |
87 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero | |
88 ; X32-NEXT: .LBB1_11: # %entry | |
89 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] | |
90 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] | |
91 ; X32-NEXT: retl | |
92 ; | |
93 ; X64-LABEL: vselect: | |
94 ; X64: # BB#0: # %entry | |
95 ; X64-NEXT: testl %ecx, %ecx | |
96 ; X64-NEXT: xorps %xmm0, %xmm0 | |
97 ; X64-NEXT: je .LBB1_1 | |
98 ; X64-NEXT: # BB#2: # %entry | |
99 ; X64-NEXT: xorps %xmm1, %xmm1 | |
100 ; X64-NEXT: testl %edx, %edx | |
101 ; X64-NEXT: jne .LBB1_5 | |
102 ; X64-NEXT: jmp .LBB1_4 | |
103 ; X64-NEXT: .LBB1_1: | |
104 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero | |
105 ; X64-NEXT: testl %edx, %edx | |
106 ; X64-NEXT: je .LBB1_4 | |
107 ; X64-NEXT: .LBB1_5: # %entry | |
108 ; X64-NEXT: xorps %xmm2, %xmm2 | |
109 ; X64-NEXT: testl %r8d, %r8d | |
110 ; X64-NEXT: jne .LBB1_8 | |
111 ; X64-NEXT: jmp .LBB1_7 | |
112 ; X64-NEXT: .LBB1_4: | |
113 ; X64-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero | |
114 ; X64-NEXT: testl %r8d, %r8d | |
115 ; X64-NEXT: je .LBB1_7 | |
116 ; X64-NEXT: .LBB1_8: # %entry | |
117 ; X64-NEXT: xorps %xmm3, %xmm3 | |
118 ; X64-NEXT: jmp .LBB1_9 | |
119 ; X64-NEXT: .LBB1_7: | |
120 ; X64-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero | |
121 ; X64-NEXT: .LBB1_9: # %entry | |
122 ; X64-NEXT: testl %esi, %esi | |
123 ; X64-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] | |
124 ; X64-NEXT: jne .LBB1_11 | |
125 ; X64-NEXT: # BB#10: | |
126 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero | |
127 ; X64-NEXT: .LBB1_11: # %entry | |
128 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] | |
129 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] | |
130 ; X64-NEXT: retq | |
45 entry: | 131 entry: |
46 %a1 = icmp eq <4 x i32> %q, zeroinitializer | 132 %a1 = icmp eq <4 x i32> %q, zeroinitializer |
47 %a14 = select <4 x i1> %a1, <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+0> , <4 x float> zeroinitializer | 133 %a14 = select <4 x i1> %a1, <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+0> , <4 x float> zeroinitializer |
48 ret <4 x float> %a14 | 134 ret <4 x float> %a14 |
49 } | 135 } |
136 | |
137 ; v4i32 isn't legal for SSE1, but this should be cmpps. | |
138 | |
139 define <4 x float> @PR28044(<4 x float> %a0, <4 x float> %a1) nounwind { | |
140 ; X32-LABEL: PR28044: | |
141 ; X32: # BB#0: | |
142 ; X32-NEXT: cmpeqps %xmm1, %xmm0 | |
143 ; X32-NEXT: retl | |
144 ; | |
145 ; X64-LABEL: PR28044: | |
146 ; X64: # BB#0: | |
147 ; X64-NEXT: cmpeqps %xmm1, %xmm0 | |
148 ; X64-NEXT: retq | |
149 %cmp = fcmp oeq <4 x float> %a0, %a1 | |
150 %sext = sext <4 x i1> %cmp to <4 x i32> | |
151 %res = bitcast <4 x i32> %sext to <4 x float> | |
152 ret <4 x float> %res | |
153 } | |
154 | |
155 ; Don't crash trying to do the impossible: an integer vector comparison doesn't exist, so we must scalarize. | |
156 ; https://llvm.org/bugs/show_bug.cgi?id=30512 | |
157 | |
158 define <4 x i32> @PR30512(<4 x i32> %x, <4 x i32> %y) nounwind { | |
159 ; X32-LABEL: PR30512: | |
160 ; X32: # BB#0: | |
161 ; X32-NEXT: pushl %ebp | |
162 ; X32-NEXT: pushl %ebx | |
163 ; X32-NEXT: pushl %edi | |
164 ; X32-NEXT: pushl %esi | |
165 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp | |
166 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi | |
167 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi | |
168 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx | |
169 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx | |
170 ; X32-NEXT: xorl %ecx, %ecx | |
171 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %edx | |
172 ; X32-NEXT: sete %cl | |
173 ; X32-NEXT: xorl %edx, %edx | |
174 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %ebx | |
175 ; X32-NEXT: sete %dl | |
176 ; X32-NEXT: xorl %ebx, %ebx | |
177 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %edi | |
178 ; X32-NEXT: sete %bl | |
179 ; X32-NEXT: xorl %eax, %eax | |
180 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %esi | |
181 ; X32-NEXT: sete %al | |
182 ; X32-NEXT: movl %eax, 12(%ebp) | |
183 ; X32-NEXT: movl %ebx, 8(%ebp) | |
184 ; X32-NEXT: movl %edx, 4(%ebp) | |
185 ; X32-NEXT: movl %ecx, (%ebp) | |
186 ; X32-NEXT: movl %ebp, %eax | |
187 ; X32-NEXT: popl %esi | |
188 ; X32-NEXT: popl %edi | |
189 ; X32-NEXT: popl %ebx | |
190 ; X32-NEXT: popl %ebp | |
191 ; X32-NEXT: retl $4 | |
192 ; | |
193 ; X64-LABEL: PR30512: | |
194 ; X64: # BB#0: | |
195 ; X64-NEXT: xorl %eax, %eax | |
196 ; X64-NEXT: cmpl %r9d, %esi | |
197 ; X64-NEXT: sete %al | |
198 ; X64-NEXT: xorl %esi, %esi | |
199 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %edx | |
200 ; X64-NEXT: sete %sil | |
201 ; X64-NEXT: xorl %edx, %edx | |
202 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %ecx | |
203 ; X64-NEXT: sete %dl | |
204 ; X64-NEXT: xorl %ecx, %ecx | |
205 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %r8d | |
206 ; X64-NEXT: sete %cl | |
207 ; X64-NEXT: movl %ecx, 12(%rdi) | |
208 ; X64-NEXT: movl %edx, 8(%rdi) | |
209 ; X64-NEXT: movl %esi, 4(%rdi) | |
210 ; X64-NEXT: movl %eax, (%rdi) | |
211 ; X64-NEXT: movq %rdi, %rax | |
212 ; X64-NEXT: retq | |
213 %cmp = icmp eq <4 x i32> %x, %y | |
214 %zext = zext <4 x i1> %cmp to <4 x i32> | |
215 ret <4 x i32> %zext | |
216 } | |
217 |