Mercurial > hg > CbC > CbC_llvm
comparison clang/test/CodeGen/arm-mve-intrinsics/vhsubq.c @ 150:1d019706d866
LLVM10
author | anatofuz |
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date | Thu, 13 Feb 2020 15:10:13 +0900 |
parents | |
children | 0572611fdcc8 |
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147:c2174574ed3a | 150:1d019706d866 |
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1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py | |
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s | |
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s | |
4 | |
5 #include <arm_mve.h> | |
6 | |
7 // CHECK-LABEL: @test_vhsubq_u8( | |
8 // CHECK-NEXT: entry: | |
9 // CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vhsub.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1) | |
10 // CHECK-NEXT: ret <16 x i8> [[TMP0]] | |
11 // | |
12 uint8x16_t test_vhsubq_u8(uint8x16_t a, uint8x16_t b) | |
13 { | |
14 #ifdef POLYMORPHIC | |
15 return vhsubq(a, b); | |
16 #else /* POLYMORPHIC */ | |
17 return vhsubq_u8(a, b); | |
18 #endif /* POLYMORPHIC */ | |
19 } | |
20 | |
21 // CHECK-LABEL: @test_vhsubq_s16( | |
22 // CHECK-NEXT: entry: | |
23 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vhsub.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0) | |
24 // CHECK-NEXT: ret <8 x i16> [[TMP0]] | |
25 // | |
26 int16x8_t test_vhsubq_s16(int16x8_t a, int16x8_t b) | |
27 { | |
28 #ifdef POLYMORPHIC | |
29 return vhsubq(a, b); | |
30 #else /* POLYMORPHIC */ | |
31 return vhsubq_s16(a, b); | |
32 #endif /* POLYMORPHIC */ | |
33 } | |
34 | |
35 // CHECK-LABEL: @test_vhsubq_u32( | |
36 // CHECK-NEXT: entry: | |
37 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vhsub.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1) | |
38 // CHECK-NEXT: ret <4 x i32> [[TMP0]] | |
39 // | |
40 uint32x4_t test_vhsubq_u32(uint32x4_t a, uint32x4_t b) | |
41 { | |
42 #ifdef POLYMORPHIC | |
43 return vhsubq(a, b); | |
44 #else /* POLYMORPHIC */ | |
45 return vhsubq_u32(a, b); | |
46 #endif /* POLYMORPHIC */ | |
47 } | |
48 | |
49 // CHECK-LABEL: @test_vhsubq_m_s8( | |
50 // CHECK-NEXT: entry: | |
51 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32 | |
52 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]]) | |
53 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.hsub.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 0, <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]]) | |
54 // CHECK-NEXT: ret <16 x i8> [[TMP2]] | |
55 // | |
56 int8x16_t test_vhsubq_m_s8(int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) | |
57 { | |
58 #ifdef POLYMORPHIC | |
59 return vhsubq_m(inactive, a, b, p); | |
60 #else /* POLYMORPHIC */ | |
61 return vhsubq_m_s8(inactive, a, b, p); | |
62 #endif /* POLYMORPHIC */ | |
63 } | |
64 | |
65 // CHECK-LABEL: @test_vhsubq_m_u16( | |
66 // CHECK-NEXT: entry: | |
67 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32 | |
68 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) | |
69 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.hsub.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]]) | |
70 // CHECK-NEXT: ret <8 x i16> [[TMP2]] | |
71 // | |
72 uint16x8_t test_vhsubq_m_u16(uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) | |
73 { | |
74 #ifdef POLYMORPHIC | |
75 return vhsubq_m(inactive, a, b, p); | |
76 #else /* POLYMORPHIC */ | |
77 return vhsubq_m_u16(inactive, a, b, p); | |
78 #endif /* POLYMORPHIC */ | |
79 } | |
80 | |
81 // CHECK-LABEL: @test_vhsubq_m_s32( | |
82 // CHECK-NEXT: entry: | |
83 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32 | |
84 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) | |
85 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.hsub.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]]) | |
86 // CHECK-NEXT: ret <4 x i32> [[TMP2]] | |
87 // | |
88 int32x4_t test_vhsubq_m_s32(int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) | |
89 { | |
90 #ifdef POLYMORPHIC | |
91 return vhsubq_m(inactive, a, b, p); | |
92 #else /* POLYMORPHIC */ | |
93 return vhsubq_m_s32(inactive, a, b, p); | |
94 #endif /* POLYMORPHIC */ | |
95 } |