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comparison llvm/test/Feature/instructions.ll @ 150:1d019706d866

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LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
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147:c2174574ed3a 150:1d019706d866
1 ; RUN: llvm-as < %s | llvm-dis > %t1.ll
2 ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
3 ; RUN: diff %t1.ll %t2.ll
4
5 define i32 @test_extractelement(<4 x i32> %V) {
6 %R = extractelement <4 x i32> %V, i32 1 ; <i32> [#uses=1]
7 %S = extractelement <4 x i32> %V, i64 1 ; <i32> [#uses=0]
8 ret i32 %R
9 }
10
11 define <4 x i32> @test_insertelement(<4 x i32> %V) {
12 %R = insertelement <4 x i32> %V, i32 0, i32 0 ; <<4 x i32>> [#uses=1]
13 %S = insertelement <4 x i32> %V, i32 0, i64 0 ; <<4 x i32>> [#uses=0]
14 ret <4 x i32> %R
15 }
16
17 define <4 x i32> @test_shufflevector_u(<4 x i32> %V) {
18 %R = shufflevector <4 x i32> %V, <4 x i32> %V, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x i32>> [#uses=1]
19 ret <4 x i32> %R
20 }
21
22 define <4 x float> @test_shufflevector_f(<4 x float> %V) {
23 %R = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]
24 ret <4 x float> %R
25 }
26