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comparison llvm/test/TableGen/SchedModelError.td @ 150:1d019706d866

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LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
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children c4bab56944e8
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147:c2174574ed3a 150:1d019706d866
1 // RUN: not llvm-tblgen -gen-subtarget -I %p/../../include %s 2>&1 | FileCheck %s -DFILE=%s
2
3 include "llvm/Target/Target.td"
4
5 def TestTarget : Target;
6
7 // CHECK: [[FILE]]:[[@LINE+1]]:1: error: No schedule information for instruction 'TestInst' in SchedMachineModel 'TestSchedModel'
8 def TestInst : Instruction {
9 let OutOperandList = (outs);
10 let InOperandList = (ins);
11 bits<8> Inst = 0b00101010;
12 }
13
14 def TestSchedModel : SchedMachineModel {
15 let CompleteModel = 1;
16 }
17
18 def TestProcessor : ProcessorModel<"testprocessor", TestSchedModel, []>;