comparison llvm/test/TableGen/trydecode-emission3.td @ 150:1d019706d866

LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
parents
children 2e18cbf3894f
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147:c2174574ed3a 150:1d019706d866
1 // RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
2
3 include "llvm/Target/Target.td"
4
5 def archInstrInfo : InstrInfo { }
6
7 def arch : Target {
8 let InstructionSet = archInstrInfo;
9 }
10
11 class TestInstruction : Instruction {
12 let Size = 1;
13 let OutOperandList = (outs);
14 let InOperandList = (ins);
15 field bits<8> Inst;
16 field bits<8> SoftFail = 0;
17 }
18
19 def InstA : TestInstruction {
20 let Inst = {0,0,0,0,?,?,?,?};
21 let AsmString = "InstA";
22 }
23
24 def InstBOp : Operand<i32> {
25 let DecoderMethod = "DecodeInstBOp";
26 let hasCompleteDecoder = 0;
27 }
28
29 def InstB : TestInstruction {
30 bits<2> op;
31 let Inst{7-2} = {0,0,0,0,0,0};
32 let Inst{1-0} = op;
33 let OutOperandList = (outs InstBOp:$op);
34 let AsmString = "InstB";
35 }
36
37 // CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...
38 // CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 18, 0, 0, // Skip to: 26
39 // CHECK-NEXT: /* 8 */ MCD::OPC_CheckField, 2, 2, 0, 7, 0, 0, // Skip to: 22
40 // CHECK-NEXT: /* 15 */ MCD::OPC_TryDecode, {{[0-9]+}}, 1, 0, 0, 0, 0, // Opcode: InstB, skip to: 22
41 // CHECK-NEXT: /* 22 */ MCD::OPC_Decode, {{[0-9]+}}, 1, 1, // Opcode: InstA
42 // CHECK-NEXT: /* 26 */ MCD::OPC_Fail,
43
44 // CHECK: if (DecodeInstBOp(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }