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comparison llvm/test/CodeGen/AMDGPU/limit-coalesce.mir @ 252:1f2b6ac9f198 llvm-original

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LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents 79ff65ed7e25
children
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237:c80f45b162ad 252:1f2b6ac9f198
1 # RUN: llc -march=amdgcn -run-pass simple-register-coalescing -o - %s | FileCheck %s 1 # RUN: llc -march=amdgcn -run-pass register-coalescer -o - %s | FileCheck %s
2 2
3 # Check that coalescer does not create wider register tuple than in source 3 # Check that coalescer does not create wider register tuple than in source
4 4
5 # CHECK: - { id: 2, class: vreg_64, preferred-register: '' } 5 # CHECK: - { id: 2, class: vreg_64, preferred-register: '' }
6 # CHECK: - { id: 3, class: vreg_64, preferred-register: '' } 6 # CHECK: - { id: 3, class: vreg_64, preferred-register: '' }