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comparison llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll @ 252:1f2b6ac9f198 llvm-original

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LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents 79ff65ed7e25
children
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237:c80f45b162ad 252:1f2b6ac9f198
3 3
4 declare i32 @llvm.amdgcn.perm(i32, i32, i32) #0 4 declare i32 @llvm.amdgcn.perm(i32, i32, i32) #0
5 5
6 ; GCN-LABEL: {{^}}v_perm_b32_v_v_v: 6 ; GCN-LABEL: {{^}}v_perm_b32_v_v_v:
7 ; GCN: v_perm_b32 v{{[0-9]+}}, v0, v1, v2 7 ; GCN: v_perm_b32 v{{[0-9]+}}, v0, v1, v2
8 define amdgpu_ps void @v_perm_b32_v_v_v(i32 %src1, i32 %src2, i32 %src3, i32 addrspace(1)* %out) #1 { 8 define amdgpu_ps void @v_perm_b32_v_v_v(i32 %src1, i32 %src2, i32 %src3, ptr addrspace(1) %out) #1 {
9 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 %src3) #0 9 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 %src3) #0
10 store i32 %val, i32 addrspace(1)* %out 10 store i32 %val, ptr addrspace(1) %out
11 ret void 11 ret void
12 } 12 }
13 13
14 ; GCN-LABEL: {{^}}v_perm_b32_v_v_c: 14 ; GCN-LABEL: {{^}}v_perm_b32_v_v_c:
15 ; GCN: v_perm_b32 v{{[0-9]+}}, v0, v1, {{[vs][0-9]+}} 15 ; GCN: v_perm_b32 v{{[0-9]+}}, v0, v1, {{[vs][0-9]+}}
16 define amdgpu_ps void @v_perm_b32_v_v_c(i32 %src1, i32 %src2, i32 addrspace(1)* %out) #1 { 16 define amdgpu_ps void @v_perm_b32_v_v_c(i32 %src1, i32 %src2, ptr addrspace(1) %out) #1 {
17 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0 17 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0
18 store i32 %val, i32 addrspace(1)* %out 18 store i32 %val, ptr addrspace(1) %out
19 ret void 19 ret void
20 } 20 }
21 21
22 ; GCN-LABEL: {{^}}v_perm_b32_s_v_c: 22 ; GCN-LABEL: {{^}}v_perm_b32_s_v_c:
23 ; GCN: v_perm_b32 v{{[0-9]+}}, s0, v0, v{{[0-9]+}} 23 ; GCN: v_perm_b32 v{{[0-9]+}}, s0, v0, v{{[0-9]+}}
24 define amdgpu_ps void @v_perm_b32_s_v_c(i32 inreg %src1, i32 %src2, i32 addrspace(1)* %out) #1 { 24 define amdgpu_ps void @v_perm_b32_s_v_c(i32 inreg %src1, i32 %src2, ptr addrspace(1) %out) #1 {
25 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0 25 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0
26 store i32 %val, i32 addrspace(1)* %out 26 store i32 %val, ptr addrspace(1) %out
27 ret void 27 ret void
28 } 28 }
29 29
30 ; GCN-LABEL: {{^}}v_perm_b32_s_s_c: 30 ; GCN-LABEL: {{^}}v_perm_b32_s_s_c:
31 ; GCN: v_perm_b32 v{{[0-9]+}}, s0, v{{[0-9]+}}, v{{[0-9]+}} 31 ; GCN: v_perm_b32 v{{[0-9]+}}, s0, v{{[0-9]+}}, v{{[0-9]+}}
32 define amdgpu_ps void @v_perm_b32_s_s_c(i32 inreg %src1, i32 inreg %src2, i32 addrspace(1)* %out) #1 { 32 define amdgpu_ps void @v_perm_b32_s_s_c(i32 inreg %src1, i32 inreg %src2, ptr addrspace(1) %out) #1 {
33 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0 33 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0
34 store i32 %val, i32 addrspace(1)* %out 34 store i32 %val, ptr addrspace(1) %out
35 ret void 35 ret void
36 } 36 }
37 37
38 ; GCN-LABEL: {{^}}v_perm_b32_v_s_i: 38 ; GCN-LABEL: {{^}}v_perm_b32_v_s_i:
39 ; GCN: v_perm_b32 v{{[0-9]+}}, v0, s0, 1 39 ; GCN: v_perm_b32 v{{[0-9]+}}, v0, s0, 1
40 define amdgpu_ps void @v_perm_b32_v_s_i(i32 %src1, i32 inreg %src2, i32 addrspace(1)* %out) #1 { 40 define amdgpu_ps void @v_perm_b32_v_s_i(i32 %src1, i32 inreg %src2, ptr addrspace(1) %out) #1 {
41 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 1) #0 41 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 1) #0
42 store i32 %val, i32 addrspace(1)* %out 42 store i32 %val, ptr addrspace(1) %out
43 ret void 43 ret void
44 } 44 }
45 45
46 attributes #0 = { nounwind readnone } 46 attributes #0 = { nounwind readnone }
47 attributes #1 = { nounwind } 47 attributes #1 = { nounwind }