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comparison llvm/test/CodeGen/AMDGPU/regcoalescer-resolve-lane-conflict-by-subranges.mir @ 252:1f2b6ac9f198 llvm-original

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LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents c4bab56944e8
children
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237:c80f45b162ad 252:1f2b6ac9f198
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -march=amdgcn -run-pass simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s 2 # RUN: llc -march=amdgcn -run-pass register-coalescer -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s
3 # 3 #
4 4
5 5
6 --- 6 ---
7 # the COPY can be coalesced based on subregister liveness 7 # the COPY can be coalesced based on subregister liveness