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comparison llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll @ 252:1f2b6ac9f198 llvm-original

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LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents c4bab56944e8
children
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equal deleted inserted replaced
237:c80f45b162ad 252:1f2b6ac9f198
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=indvars -S < %s | FileCheck %s 2 ; RUN: opt -passes=indvars -S < %s | FileCheck %s
3 3
4 ; Monotonic decrementing iv. we should be able to prove that %iv.next <s len 4 ; Monotonic decrementing iv. we should be able to prove that %iv.next <s len
5 ; basing on its nsw and the fact that its starting value <s len. 5 ; basing on its nsw and the fact that its starting value <s len.
6 define i32 @test_01(i32* %p) { 6 define i32 @test_01(ptr %p) {
7 ; CHECK-LABEL: @test_01( 7 ; CHECK-LABEL: @test_01(
8 ; CHECK-NEXT: entry: 8 ; CHECK-NEXT: entry:
9 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG0:!range !.*]] 9 ; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG0:!range !.*]]
10 ; CHECK-NEXT: br label [[LOOP:%.*]] 10 ; CHECK-NEXT: br label [[LOOP:%.*]]
11 ; CHECK: loop: 11 ; CHECK: loop:
12 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] 12 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
13 ; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1 13 ; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1
14 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]] 14 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
19 ; CHECK-NEXT: ret i32 -1 19 ; CHECK-NEXT: ret i32 -1
20 ; CHECK: exit: 20 ; CHECK: exit:
21 ; CHECK-NEXT: ret i32 0 21 ; CHECK-NEXT: ret i32 0
22 ; 22 ;
23 entry: 23 entry:
24 %len = load i32, i32* %p, !range !0 24 %len = load i32, ptr %p, !range !0
25 br label %loop 25 br label %loop
26 26
27 loop: 27 loop:
28 %iv = phi i32 [%len, %entry], [%iv.next, %backedge] 28 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
29 %iv.next = add i32 %iv, -1 29 %iv.next = add i32 %iv, -1
40 exit: 40 exit:
41 ret i32 0 41 ret i32 0
42 } 42 }
43 43
44 ; We should not remove this range check because signed overflow is possible here (start at len = 0). 44 ; We should not remove this range check because signed overflow is possible here (start at len = 0).
45 define i32 @test_01_neg(i32* %p) { 45 define i32 @test_01_neg(ptr %p) {
46 ; CHECK-LABEL: @test_01_neg( 46 ; CHECK-LABEL: @test_01_neg(
47 ; CHECK-NEXT: entry: 47 ; CHECK-NEXT: entry:
48 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG0]] 48 ; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG0]]
49 ; CHECK-NEXT: br label [[LOOP:%.*]] 49 ; CHECK-NEXT: br label [[LOOP:%.*]]
50 ; CHECK: loop: 50 ; CHECK: loop:
51 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] 51 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
52 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], -1 52 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], -1
53 ; CHECK-NEXT: [[RC:%.*]] = icmp slt i32 [[IV_NEXT]], [[LEN]] 53 ; CHECK-NEXT: [[RC:%.*]] = icmp slt i32 [[IV_NEXT]], [[LEN]]
59 ; CHECK-NEXT: ret i32 -1 59 ; CHECK-NEXT: ret i32 -1
60 ; CHECK: exit: 60 ; CHECK: exit:
61 ; CHECK-NEXT: ret i32 0 61 ; CHECK-NEXT: ret i32 0
62 ; 62 ;
63 entry: 63 entry:
64 %len = load i32, i32* %p, !range !0 64 %len = load i32, ptr %p, !range !0
65 br label %loop 65 br label %loop
66 66
67 loop: 67 loop:
68 %iv = phi i32 [%len, %entry], [%iv.next, %backedge] 68 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
69 %iv.next = add i32 %iv, -1 69 %iv.next = add i32 %iv, -1
81 ret i32 0 81 ret i32 0
82 } 82 }
83 83
84 ; Monotonic incrementing iv. we should be able to prove that %iv.next >s len 84 ; Monotonic incrementing iv. we should be able to prove that %iv.next >s len
85 ; basing on its nsw and the fact that its starting value >s len. 85 ; basing on its nsw and the fact that its starting value >s len.
86 define i32 @test_02(i32* %p) { 86 define i32 @test_02(ptr %p) {
87 ; CHECK-LABEL: @test_02( 87 ; CHECK-LABEL: @test_02(
88 ; CHECK-NEXT: entry: 88 ; CHECK-NEXT: entry:
89 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG1:!range !.*]] 89 ; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG1:!range !.*]]
90 ; CHECK-NEXT: br label [[LOOP:%.*]] 90 ; CHECK-NEXT: br label [[LOOP:%.*]]
91 ; CHECK: loop: 91 ; CHECK: loop:
92 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] 92 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
93 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 93 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
94 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]] 94 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
99 ; CHECK-NEXT: ret i32 -1 99 ; CHECK-NEXT: ret i32 -1
100 ; CHECK: exit: 100 ; CHECK: exit:
101 ; CHECK-NEXT: ret i32 0 101 ; CHECK-NEXT: ret i32 0
102 ; 102 ;
103 entry: 103 entry:
104 %len = load i32, i32* %p, !range !1 104 %len = load i32, ptr %p, !range !1
105 br label %loop 105 br label %loop
106 106
107 loop: 107 loop:
108 %iv = phi i32 [%len, %entry], [%iv.next, %backedge] 108 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
109 %iv.next = add i32 %iv, 1 109 %iv.next = add i32 %iv, 1
120 exit: 120 exit:
121 ret i32 0 121 ret i32 0
122 } 122 }
123 123
124 ; We should not remove this range check because signed overflow is possible here (start at len = -1). 124 ; We should not remove this range check because signed overflow is possible here (start at len = -1).
125 define i32 @test_02_neg(i32* %p) { 125 define i32 @test_02_neg(ptr %p) {
126 ; CHECK-LABEL: @test_02_neg( 126 ; CHECK-LABEL: @test_02_neg(
127 ; CHECK-NEXT: entry: 127 ; CHECK-NEXT: entry:
128 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG1]] 128 ; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG1]]
129 ; CHECK-NEXT: br label [[LOOP:%.*]] 129 ; CHECK-NEXT: br label [[LOOP:%.*]]
130 ; CHECK: loop: 130 ; CHECK: loop:
131 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] 131 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
132 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 132 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
133 ; CHECK-NEXT: [[RC:%.*]] = icmp sgt i32 [[IV_NEXT]], [[LEN]] 133 ; CHECK-NEXT: [[RC:%.*]] = icmp sgt i32 [[IV_NEXT]], [[LEN]]
139 ; CHECK-NEXT: ret i32 -1 139 ; CHECK-NEXT: ret i32 -1
140 ; CHECK: exit: 140 ; CHECK: exit:
141 ; CHECK-NEXT: ret i32 0 141 ; CHECK-NEXT: ret i32 0
142 ; 142 ;
143 entry: 143 entry:
144 %len = load i32, i32* %p, !range !1 144 %len = load i32, ptr %p, !range !1
145 br label %loop 145 br label %loop
146 146
147 loop: 147 loop:
148 %iv = phi i32 [%len, %entry], [%iv.next, %backedge] 148 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
149 %iv.next = add i32 %iv, 1 149 %iv.next = add i32 %iv, 1
159 159
160 exit: 160 exit:
161 ret i32 0 161 ret i32 0
162 } 162 }
163 163
164 define i32 @test_03(i32* %p) { 164 define i32 @test_03(ptr %p) {
165 ; CHECK-LABEL: @test_03( 165 ; CHECK-LABEL: @test_03(
166 ; CHECK-NEXT: entry: 166 ; CHECK-NEXT: entry:
167 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG2:!range !.*]] 167 ; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG2:!range !.*]]
168 ; CHECK-NEXT: br label [[LOOP:%.*]] 168 ; CHECK-NEXT: br label [[LOOP:%.*]]
169 ; CHECK: loop: 169 ; CHECK: loop:
170 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] 170 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
171 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1 171 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
172 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]] 172 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
177 ; CHECK-NEXT: ret i32 -1 177 ; CHECK-NEXT: ret i32 -1
178 ; CHECK: exit: 178 ; CHECK: exit:
179 ; CHECK-NEXT: ret i32 0 179 ; CHECK-NEXT: ret i32 0
180 ; 180 ;
181 entry: 181 entry:
182 %len = load i32, i32* %p, !range !2 182 %len = load i32, ptr %p, !range !2
183 br label %loop 183 br label %loop
184 184
185 loop: 185 loop:
186 %iv = phi i32 [%len, %entry], [%iv.next, %backedge] 186 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
187 %iv.next = add i32 %iv, 1 187 %iv.next = add i32 %iv, 1
197 197
198 exit: 198 exit:
199 ret i32 0 199 ret i32 0
200 } 200 }
201 201
202 define i32 @test_04(i32* %p) { 202 define i32 @test_04(ptr %p) {
203 ; CHECK-LABEL: @test_04( 203 ; CHECK-LABEL: @test_04(
204 ; CHECK-NEXT: entry: 204 ; CHECK-NEXT: entry:
205 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG2]] 205 ; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG2]]
206 ; CHECK-NEXT: br label [[LOOP:%.*]] 206 ; CHECK-NEXT: br label [[LOOP:%.*]]
207 ; CHECK: loop: 207 ; CHECK: loop:
208 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] 208 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
209 ; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1 209 ; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1
210 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]] 210 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
215 ; CHECK-NEXT: ret i32 -1 215 ; CHECK-NEXT: ret i32 -1
216 ; CHECK: exit: 216 ; CHECK: exit:
217 ; CHECK-NEXT: ret i32 0 217 ; CHECK-NEXT: ret i32 0
218 ; 218 ;
219 entry: 219 entry:
220 %len = load i32, i32* %p, !range !2 220 %len = load i32, ptr %p, !range !2
221 br label %loop 221 br label %loop
222 222
223 loop: 223 loop:
224 %iv = phi i32 [%len, %entry], [%iv.next, %backedge] 224 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
225 %iv.next = add i32 %iv, -1 225 %iv.next = add i32 %iv, -1