Mercurial > hg > CbC > CbC_llvm
comparison llvm/test/Transforms/MergeFunc/no-merge-block-address-different-labels.ll @ 252:1f2b6ac9f198 llvm-original
LLVM16-1
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Fri, 18 Aug 2023 09:04:13 +0900 |
parents | 1d019706d866 |
children |
comparison
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237:c80f45b162ad | 252:1f2b6ac9f198 |
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1 ; RUN: opt -S -mergefunc < %s | FileCheck %s | 1 ; RUN: opt -S -passes=mergefunc < %s | FileCheck %s |
2 | 2 |
3 ; There is a slight different in these two functions, in that the label values | 3 ; There is a slight different in these two functions, in that the label values |
4 ; are switched. They are thus not mergeable. This tests that block addresses | 4 ; are switched. They are thus not mergeable. This tests that block addresses |
5 ; referring to blocks within each respective compared function are correctly | 5 ; referring to blocks within each respective compared function are correctly |
6 ; ordered. | 6 ; ordered. |
14 ; CHECK-NEXT: entry: | 14 ; CHECK-NEXT: entry: |
15 ; CHECK-NEXT: alloca | 15 ; CHECK-NEXT: alloca |
16 entry: | 16 entry: |
17 %i.addr = alloca i32, align 4 | 17 %i.addr = alloca i32, align 4 |
18 %ret = alloca i32, align 4 | 18 %ret = alloca i32, align 4 |
19 %l = alloca i8*, align 8 | 19 %l = alloca ptr, align 8 |
20 store i32 %i, i32* %i.addr, align 4 | 20 store i32 %i, ptr %i.addr, align 4 |
21 store i32 0, i32* %ret, align 4 | 21 store i32 0, ptr %ret, align 4 |
22 ; Right here, this is val_0, and later the if might assign val_1 | 22 ; Right here, this is val_0, and later the if might assign val_1 |
23 store i8* blockaddress(@_Z1fi, %val_0), i8** %l, align 8 | 23 store ptr blockaddress(@_Z1fi, %val_0), ptr %l, align 8 |
24 %0 = load i32, i32* %i.addr, align 4 | 24 %0 = load i32, ptr %i.addr, align 4 |
25 %and = and i32 %0, 256 | 25 %and = and i32 %0, 256 |
26 %cmp = icmp eq i32 %and, 0 | 26 %cmp = icmp eq i32 %and, 0 |
27 br i1 %cmp, label %if.then, label %if.end | 27 br i1 %cmp, label %if.then, label %if.end |
28 | 28 |
29 if.then: | 29 if.then: |
30 store i8* blockaddress(@_Z1fi, %val_1), i8** %l, align 8 | 30 store ptr blockaddress(@_Z1fi, %val_1), ptr %l, align 8 |
31 br label %if.end | 31 br label %if.end |
32 | 32 |
33 if.end: | 33 if.end: |
34 %1 = load i8*, i8** %l, align 8 | 34 %1 = load ptr, ptr %l, align 8 |
35 br label %indirectgoto | 35 br label %indirectgoto |
36 | 36 |
37 val_0: | 37 val_0: |
38 store i32 12, i32* %ret, align 4 | 38 store i32 12, ptr %ret, align 4 |
39 br label %end | 39 br label %end |
40 | 40 |
41 val_1: | 41 val_1: |
42 store i32 42, i32* %ret, align 4 | 42 store i32 42, ptr %ret, align 4 |
43 br label %end | 43 br label %end |
44 | 44 |
45 end: | 45 end: |
46 %2 = load i32, i32* %ret, align 4 | 46 %2 = load i32, ptr %ret, align 4 |
47 ret i32 %2 | 47 ret i32 %2 |
48 | 48 |
49 indirectgoto: | 49 indirectgoto: |
50 %indirect.goto.dest = phi i8* [ %1, %if.end ] | 50 %indirect.goto.dest = phi ptr [ %1, %if.end ] |
51 indirectbr i8* %indirect.goto.dest, [label %val_0, label %val_1] | 51 indirectbr ptr %indirect.goto.dest, [label %val_0, label %val_1] |
52 } | 52 } |
53 | 53 |
54 ; Function Attrs: nounwind uwtable | 54 ; Function Attrs: nounwind uwtable |
55 define i32 @_Z1gi(i32 %i) #0 { | 55 define i32 @_Z1gi(i32 %i) #0 { |
56 ; CHECK-LABEL: define i32 @_Z1gi | 56 ; CHECK-LABEL: define i32 @_Z1gi |
57 ; CHECK-NEXT: entry: | 57 ; CHECK-NEXT: entry: |
58 ; CHECK-NEXT: alloca | 58 ; CHECK-NEXT: alloca |
59 entry: | 59 entry: |
60 %i.addr = alloca i32, align 4 | 60 %i.addr = alloca i32, align 4 |
61 %ret = alloca i32, align 4 | 61 %ret = alloca i32, align 4 |
62 %l = alloca i8*, align 8 | 62 %l = alloca ptr, align 8 |
63 store i32 %i, i32* %i.addr, align 4 | 63 store i32 %i, ptr %i.addr, align 4 |
64 store i32 0, i32* %ret, align 4 | 64 store i32 0, ptr %ret, align 4 |
65 ; This time, we store val_1 initially, and later the if might assign val_0 | 65 ; This time, we store val_1 initially, and later the if might assign val_0 |
66 store i8* blockaddress(@_Z1gi, %val_1), i8** %l, align 8 | 66 store ptr blockaddress(@_Z1gi, %val_1), ptr %l, align 8 |
67 %0 = load i32, i32* %i.addr, align 4 | 67 %0 = load i32, ptr %i.addr, align 4 |
68 %and = and i32 %0, 256 | 68 %and = and i32 %0, 256 |
69 %cmp = icmp eq i32 %and, 0 | 69 %cmp = icmp eq i32 %and, 0 |
70 br i1 %cmp, label %if.then, label %if.end | 70 br i1 %cmp, label %if.then, label %if.end |
71 | 71 |
72 if.then: | 72 if.then: |
73 store i8* blockaddress(@_Z1gi, %val_0), i8** %l, align 8 | 73 store ptr blockaddress(@_Z1gi, %val_0), ptr %l, align 8 |
74 br label %if.end | 74 br label %if.end |
75 | 75 |
76 if.end: | 76 if.end: |
77 %1 = load i8*, i8** %l, align 8 | 77 %1 = load ptr, ptr %l, align 8 |
78 br label %indirectgoto | 78 br label %indirectgoto |
79 | 79 |
80 val_0: | 80 val_0: |
81 store i32 12, i32* %ret, align 4 | 81 store i32 12, ptr %ret, align 4 |
82 br label %end | 82 br label %end |
83 | 83 |
84 val_1: | 84 val_1: |
85 store i32 42, i32* %ret, align 4 | 85 store i32 42, ptr %ret, align 4 |
86 br label %end | 86 br label %end |
87 | 87 |
88 end: | 88 end: |
89 %2 = load i32, i32* %ret, align 4 | 89 %2 = load i32, ptr %ret, align 4 |
90 ret i32 %2 | 90 ret i32 %2 |
91 | 91 |
92 indirectgoto: | 92 indirectgoto: |
93 %indirect.goto.dest = phi i8* [ %1, %if.end ] | 93 %indirect.goto.dest = phi ptr [ %1, %if.end ] |
94 indirectbr i8* %indirect.goto.dest, [label %val_1, label %val_0] | 94 indirectbr ptr %indirect.goto.dest, [label %val_1, label %val_0] |
95 } | 95 } |
96 | 96 |