comparison clang/test/CodeGen/aix-altivec.c @ 207:2e18cbf3894f

LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
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173:0572611fdcc8 207:2e18cbf3894f
1 // REQUIRES: powerpc-registered-target
2 // RUN: %clang_cc1 -triple powerpc64-unknown-aix -target-feature +altivec -target-cpu pwr8 -emit-llvm %s -o - | FileCheck %s
3 // RUN: %clang_cc1 -triple powerpc-unknown-aix -target-feature +altivec -target-cpu pwr8 -emit-llvm %s -o - | FileCheck %s
4 vector float foo1(vector float x) { return x; }
5 // CHECK: define <4 x float> @foo1(<4 x float> %x) [[ATTR:#[0-9]+]] {
6 // CHECK: entry:
7 // CHECK: %x.addr = alloca <4 x float>, align 16
8 // CHECK: store <4 x float> %x, <4 x float>* %x.addr, align 16
9 // CHECK: %0 = load <4 x float>, <4 x float>* %x.addr, align 16
10 // CHECK: ret <4 x float> %0
11 // CHECK: }
12 vector double foo2(vector double x) { return x; }
13 // CHECK: define <2 x double> @foo2(<2 x double> %x) [[ATTR]] {
14 // CHECK: entry:
15 // CHECK: %x.addr = alloca <2 x double>, align 16
16 // CHECK: store <2 x double> %x, <2 x double>* %x.addr, align 16
17 // CHECK: %0 = load <2 x double>, <2 x double>* %x.addr, align 16
18 // CHECK: ret <2 x double> %0
19 // CHECK: }
20 vector int foo3(vector int x) { return x; }
21 // CHECK: define <4 x i32> @foo3(<4 x i32> %x) [[ATTR]] {
22 // CHECK: entry:
23 // CHECK: %x.addr = alloca <4 x i32>, align 16
24 // CHECK: store <4 x i32> %x, <4 x i32>* %x.addr, align 16
25 // CHECK: %0 = load <4 x i32>, <4 x i32>* %x.addr, align 16
26 // CHECK: ret <4 x i32> %0
27 // CHECK: }
28 vector short int foo4(vector short int x) { return x; }
29 // CHECK: define <8 x i16> @foo4(<8 x i16> %x) [[ATTR]] {
30 // CHECK: entry:
31 // CHECK: %x.addr = alloca <8 x i16>, align 16
32 // CHECK: store <8 x i16> %x, <8 x i16>* %x.addr, align 16
33 // CHECK: %0 = load <8 x i16>, <8 x i16>* %x.addr, align 16
34 // CHECK: ret <8 x i16> %0
35 // CHECK: }
36 vector char foo5(vector char x) { return x; }
37 // CHECK: define <16 x i8> @foo5(<16 x i8> %x) [[ATTR]] {
38 // CHECK: entry:
39 // CHECK: %x.addr = alloca <16 x i8>, align 16
40 // CHECK: store <16 x i8> %x, <16 x i8>* %x.addr, align 16
41 // CHECK: %0 = load <16 x i8>, <16 x i8>* %x.addr, align 16
42 // CHECK: ret <16 x i8> %0
43 // CHECK: }
44