comparison lib/Target/NVPTX/NVPTXTargetMachine.cpp @ 134:3a76565eade5 LLVM5.0.1

update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 803732b1fca8
children c2174574ed3a
comparison
equal deleted inserted replaced
133:c60214abe0e8 134:3a76565eade5
178 PM.add(createNVVMReflectPass()); 178 PM.add(createNVVMReflectPass());
179 PM.add(createNVVMIntrRangePass(Subtarget.getSmVersion())); 179 PM.add(createNVVMIntrRangePass(Subtarget.getSmVersion()));
180 }); 180 });
181 } 181 }
182 182
183 TargetIRAnalysis NVPTXTargetMachine::getTargetIRAnalysis() { 183 TargetTransformInfo
184 return TargetIRAnalysis([this](const Function &F) { 184 NVPTXTargetMachine::getTargetTransformInfo(const Function &F) {
185 return TargetTransformInfo(NVPTXTTIImpl(this, F)); 185 return TargetTransformInfo(NVPTXTTIImpl(this, F));
186 });
187 } 186 }
188 187
189 void NVPTXPassConfig::addEarlyCSEOrGVNPass() { 188 void NVPTXPassConfig::addEarlyCSEOrGVNPass() {
190 if (getOptLevel() == CodeGenOpt::Aggressive) 189 if (getOptLevel() == CodeGenOpt::Aggressive)
191 addPass(createGVNPass()); 190 addPass(createGVNPass());
322 321
323 322
324 addPass(&StackSlotColoringID); 323 addPass(&StackSlotColoringID);
325 324
326 // FIXME: Needs physical registers 325 // FIXME: Needs physical registers
327 //addPass(&PostRAMachineLICMID); 326 //addPass(&MachineLICMID);
328 327
329 printAndVerify("After StackSlotColoring"); 328 printAndVerify("After StackSlotColoring");
330 } 329 }
331 330
332 void NVPTXPassConfig::addMachineSSAOptimization() { 331 void NVPTXPassConfig::addMachineSSAOptimization() {
357 // like if-conversion. Such passes will typically need dominator trees and 356 // like if-conversion. Such passes will typically need dominator trees and
358 // loop info, just like LICM and CSE below. 357 // loop info, just like LICM and CSE below.
359 if (addILPOpts()) 358 if (addILPOpts())
360 printAndVerify("After ILP optimizations"); 359 printAndVerify("After ILP optimizations");
361 360
362 addPass(&MachineLICMID); 361 addPass(&EarlyMachineLICMID);
363 addPass(&MachineCSEID); 362 addPass(&MachineCSEID);
364 363
365 addPass(&MachineSinkingID); 364 addPass(&MachineSinkingID);
366 printAndVerify("After Machine LICM, CSE and Sinking passes"); 365 printAndVerify("After Machine LICM, CSE and Sinking passes");
367 366