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comparison test/CodeGen/Mips/llvm-ir/srem.ll @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 1172e4bd9c6f
children c2174574ed3a
comparison
equal deleted inserted replaced
133:c60214abe0e8 134:3a76565eade5
28 28
29 ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \ 29 ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
30 ; RUN: -check-prefixes=ALL,MMR3,MM32 30 ; RUN: -check-prefixes=ALL,MMR3,MM32
31 ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ 31 ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
32 ; RUN: -check-prefixes=ALL,MMR6,MM32 32 ; RUN: -check-prefixes=ALL,MMR6,MM32
33 ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
34 ; RUN: -check-prefixes=ALL,MMR6,MM64
35 33
36 define signext i1 @srem_i1(i1 signext %a, i1 signext %b) { 34 define signext i1 @srem_i1(i1 signext %a, i1 signext %b) {
37 entry: 35 entry:
38 ; ALL-LABEL: srem_i1: 36 ; ALL-LABEL: srem_i1:
39 37
164 ; 64R6: dmod $2, $4, $5 162 ; 64R6: dmod $2, $4, $5
165 ; 64R6: teq $5, $zero, 7 163 ; 64R6: teq $5, $zero, 7
166 164
167 ; MM32: lw $25, %call16(__moddi3)($2) 165 ; MM32: lw $25, %call16(__moddi3)($2)
168 166
169 ; MM64: dmod $2, $4, $5
170 ; MM64: teq $5, $zero, 7
171
172 %r = srem i64 %a, %b 167 %r = srem i64 %a, %b
173 ret i64 %r 168 ret i64 %r
174 } 169 }
175 170
176 define signext i128 @srem_i128(i128 signext %a, i128 signext %b) { 171 define signext i128 @srem_i128(i128 signext %a, i128 signext %b) {
182 ; GP64-NOT-R6: ld $25, %call16(__modti3)($gp) 177 ; GP64-NOT-R6: ld $25, %call16(__modti3)($gp)
183 ; 64R6: ld $25, %call16(__modti3)($gp) 178 ; 64R6: ld $25, %call16(__modti3)($gp)
184 179
185 ; MM32: lw $25, %call16(__modti3)($16) 180 ; MM32: lw $25, %call16(__modti3)($16)
186 181
187 ; MM64: ld $25, %call16(__modti3)($2)
188
189 %r = srem i128 %a, %b 182 %r = srem i128 %a, %b
190 ret i128 %r 183 ret i128 %r
191 } 184 }