comparison test/CodeGen/RISCV/inline-asm.ll @ 134:3a76565eade5 LLVM5.0.1

update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents
children c2174574ed3a
comparison
equal deleted inserted replaced
133:c60214abe0e8 134:3a76565eade5
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=RV32I %s
4
5 @gi = external global i32
6
7 define i32 @constraint_r(i32 %a) {
8 ; RV32I-LABEL: constraint_r:
9 ; RV32I: # %bb.0:
10 ; RV32I-NEXT: lui a1, %hi(gi)
11 ; RV32I-NEXT: addi a1, a1, %lo(gi)
12 ; RV32I-NEXT: lw a1, 0(a1)
13 ; RV32I-NEXT: #APP
14 ; RV32I-NEXT: add a0, a0, a1
15 ; RV32I-NEXT: #NO_APP
16 ; RV32I-NEXT: ret
17 %1 = load i32, i32* @gi
18 %2 = tail call i32 asm "add $0, $1, $2", "=r,r,r"(i32 %a, i32 %1)
19 ret i32 %2
20 }
21
22 define i32 @constraint_i(i32 %a) {
23 ; RV32I-LABEL: constraint_i:
24 ; RV32I: # %bb.0:
25 ; RV32I-NEXT: #APP
26 ; RV32I-NEXT: addi a0, a0, 113
27 ; RV32I-NEXT: #NO_APP
28 ; RV32I-NEXT: ret
29 %1 = load i32, i32* @gi
30 %2 = tail call i32 asm "addi $0, $1, $2", "=r,r,i"(i32 %a, i32 113)
31 ret i32 %2
32 }
33
34 define void @constraint_m(i32* %a) {
35 ; RV32I-LABEL: constraint_m:
36 ; RV32I: # %bb.0:
37 ; RV32I-NEXT: #APP
38 ; RV32I-NEXT: #NO_APP
39 ; RV32I-NEXT: ret
40 call void asm sideeffect "", "=*m"(i32* %a)
41 ret void
42 }
43
44 define i32 @constraint_m2(i32* %a) {
45 ; RV32I-LABEL: constraint_m2:
46 ; RV32I: # %bb.0:
47 ; RV32I-NEXT: #APP
48 ; RV32I-NEXT: lw a0, 0(a0)
49 ; RV32I-NEXT: #NO_APP
50 ; RV32I-NEXT: ret
51 %1 = tail call i32 asm "lw $0, $1", "=r,*m"(i32* %a) nounwind
52 ret i32 %1
53 }
54
55 ; TODO: expend tests for more complex constraints, out of range immediates etc