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comparison test/CodeGen/RISCV/sext-zext-trunc.ll @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
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children c2174574ed3a
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133:c60214abe0e8 134:3a76565eade5
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck %s -check-prefix=RV32I
4
5 define i8 @sext_i1_to_i8(i1 %a) {
6 ; RV32I-LABEL: sext_i1_to_i8:
7 ; RV32I: # %bb.0:
8 ; RV32I-NEXT: andi a0, a0, 1
9 ; RV32I-NEXT: neg a0, a0
10 ; RV32I-NEXT: ret
11 %1 = sext i1 %a to i8
12 ret i8 %1
13 }
14
15 define i16 @sext_i1_to_i16(i1 %a) {
16 ; RV32I-LABEL: sext_i1_to_i16:
17 ; RV32I: # %bb.0:
18 ; RV32I-NEXT: andi a0, a0, 1
19 ; RV32I-NEXT: neg a0, a0
20 ; RV32I-NEXT: ret
21 %1 = sext i1 %a to i16
22 ret i16 %1
23 }
24
25 define i32 @sext_i1_to_i32(i1 %a) {
26 ; RV32I-LABEL: sext_i1_to_i32:
27 ; RV32I: # %bb.0:
28 ; RV32I-NEXT: andi a0, a0, 1
29 ; RV32I-NEXT: neg a0, a0
30 ; RV32I-NEXT: ret
31 %1 = sext i1 %a to i32
32 ret i32 %1
33 }
34
35 define i64 @sext_i1_to_i64(i1 %a) {
36 ; RV32I-LABEL: sext_i1_to_i64:
37 ; RV32I: # %bb.0:
38 ; RV32I-NEXT: andi a0, a0, 1
39 ; RV32I-NEXT: neg a0, a0
40 ; RV32I-NEXT: mv a1, a0
41 ; RV32I-NEXT: ret
42 %1 = sext i1 %a to i64
43 ret i64 %1
44 }
45
46 define i16 @sext_i8_to_i16(i8 %a) {
47 ; RV32I-LABEL: sext_i8_to_i16:
48 ; RV32I: # %bb.0:
49 ; RV32I-NEXT: slli a0, a0, 24
50 ; RV32I-NEXT: srai a0, a0, 24
51 ; RV32I-NEXT: ret
52 %1 = sext i8 %a to i16
53 ret i16 %1
54 }
55
56 define i32 @sext_i8_to_i32(i8 %a) {
57 ; RV32I-LABEL: sext_i8_to_i32:
58 ; RV32I: # %bb.0:
59 ; RV32I-NEXT: slli a0, a0, 24
60 ; RV32I-NEXT: srai a0, a0, 24
61 ; RV32I-NEXT: ret
62 %1 = sext i8 %a to i32
63 ret i32 %1
64 }
65
66 define i64 @sext_i8_to_i64(i8 %a) {
67 ; RV32I-LABEL: sext_i8_to_i64:
68 ; RV32I: # %bb.0:
69 ; RV32I-NEXT: slli a1, a0, 24
70 ; RV32I-NEXT: srai a0, a1, 24
71 ; RV32I-NEXT: srai a1, a1, 31
72 ; RV32I-NEXT: ret
73 %1 = sext i8 %a to i64
74 ret i64 %1
75 }
76
77 define i32 @sext_i16_to_i32(i16 %a) {
78 ; RV32I-LABEL: sext_i16_to_i32:
79 ; RV32I: # %bb.0:
80 ; RV32I-NEXT: slli a0, a0, 16
81 ; RV32I-NEXT: srai a0, a0, 16
82 ; RV32I-NEXT: ret
83 %1 = sext i16 %a to i32
84 ret i32 %1
85 }
86
87 define i64 @sext_i16_to_i64(i16 %a) {
88 ; RV32I-LABEL: sext_i16_to_i64:
89 ; RV32I: # %bb.0:
90 ; RV32I-NEXT: slli a1, a0, 16
91 ; RV32I-NEXT: srai a0, a1, 16
92 ; RV32I-NEXT: srai a1, a1, 31
93 ; RV32I-NEXT: ret
94 %1 = sext i16 %a to i64
95 ret i64 %1
96 }
97
98 define i64 @sext_i32_to_i64(i32 %a) {
99 ; RV32I-LABEL: sext_i32_to_i64:
100 ; RV32I: # %bb.0:
101 ; RV32I-NEXT: srai a1, a0, 31
102 ; RV32I-NEXT: ret
103 %1 = sext i32 %a to i64
104 ret i64 %1
105 }
106
107 define i8 @zext_i1_to_i8(i1 %a) {
108 ; RV32I-LABEL: zext_i1_to_i8:
109 ; RV32I: # %bb.0:
110 ; RV32I-NEXT: andi a0, a0, 1
111 ; RV32I-NEXT: ret
112 %1 = zext i1 %a to i8
113 ret i8 %1
114 }
115
116 define i16 @zext_i1_to_i16(i1 %a) {
117 ; RV32I-LABEL: zext_i1_to_i16:
118 ; RV32I: # %bb.0:
119 ; RV32I-NEXT: andi a0, a0, 1
120 ; RV32I-NEXT: ret
121 %1 = zext i1 %a to i16
122 ret i16 %1
123 }
124
125 define i32 @zext_i1_to_i32(i1 %a) {
126 ; RV32I-LABEL: zext_i1_to_i32:
127 ; RV32I: # %bb.0:
128 ; RV32I-NEXT: andi a0, a0, 1
129 ; RV32I-NEXT: ret
130 %1 = zext i1 %a to i32
131 ret i32 %1
132 }
133
134 define i64 @zext_i1_to_i64(i1 %a) {
135 ; RV32I-LABEL: zext_i1_to_i64:
136 ; RV32I: # %bb.0:
137 ; RV32I-NEXT: andi a0, a0, 1
138 ; RV32I-NEXT: mv a1, zero
139 ; RV32I-NEXT: ret
140 %1 = zext i1 %a to i64
141 ret i64 %1
142 }
143
144 define i16 @zext_i8_to_i16(i8 %a) {
145 ; RV32I-LABEL: zext_i8_to_i16:
146 ; RV32I: # %bb.0:
147 ; RV32I-NEXT: andi a0, a0, 255
148 ; RV32I-NEXT: ret
149 %1 = zext i8 %a to i16
150 ret i16 %1
151 }
152
153 define i32 @zext_i8_to_i32(i8 %a) {
154 ; RV32I-LABEL: zext_i8_to_i32:
155 ; RV32I: # %bb.0:
156 ; RV32I-NEXT: andi a0, a0, 255
157 ; RV32I-NEXT: ret
158 %1 = zext i8 %a to i32
159 ret i32 %1
160 }
161
162 define i64 @zext_i8_to_i64(i8 %a) {
163 ; RV32I-LABEL: zext_i8_to_i64:
164 ; RV32I: # %bb.0:
165 ; RV32I-NEXT: andi a0, a0, 255
166 ; RV32I-NEXT: mv a1, zero
167 ; RV32I-NEXT: ret
168 %1 = zext i8 %a to i64
169 ret i64 %1
170 }
171
172 define i32 @zext_i16_to_i32(i16 %a) {
173 ; RV32I-LABEL: zext_i16_to_i32:
174 ; RV32I: # %bb.0:
175 ; RV32I-NEXT: lui a1, 16
176 ; RV32I-NEXT: addi a1, a1, -1
177 ; RV32I-NEXT: and a0, a0, a1
178 ; RV32I-NEXT: ret
179 %1 = zext i16 %a to i32
180 ret i32 %1
181 }
182
183 define i64 @zext_i16_to_i64(i16 %a) {
184 ; RV32I-LABEL: zext_i16_to_i64:
185 ; RV32I: # %bb.0:
186 ; RV32I-NEXT: lui a1, 16
187 ; RV32I-NEXT: addi a1, a1, -1
188 ; RV32I-NEXT: and a0, a0, a1
189 ; RV32I-NEXT: mv a1, zero
190 ; RV32I-NEXT: ret
191 %1 = zext i16 %a to i64
192 ret i64 %1
193 }
194
195 define i64 @zext_i32_to_i64(i32 %a) {
196 ; RV32I-LABEL: zext_i32_to_i64:
197 ; RV32I: # %bb.0:
198 ; RV32I-NEXT: mv a1, zero
199 ; RV32I-NEXT: ret
200 %1 = zext i32 %a to i64
201 ret i64 %1
202 }
203
204 ; TODO: should the trunc tests explicitly ensure no code is generated before
205 ; jalr?
206
207 define i1 @trunc_i8_to_i1(i8 %a) {
208 ; RV32I-LABEL: trunc_i8_to_i1:
209 ; RV32I: # %bb.0:
210 ; RV32I-NEXT: ret
211 %1 = trunc i8 %a to i1
212 ret i1 %1
213 }
214
215 define i1 @trunc_i16_to_i1(i16 %a) {
216 ; RV32I-LABEL: trunc_i16_to_i1:
217 ; RV32I: # %bb.0:
218 ; RV32I-NEXT: ret
219 %1 = trunc i16 %a to i1
220 ret i1 %1
221 }
222
223 define i1 @trunc_i32_to_i1(i32 %a) {
224 ; RV32I-LABEL: trunc_i32_to_i1:
225 ; RV32I: # %bb.0:
226 ; RV32I-NEXT: ret
227 %1 = trunc i32 %a to i1
228 ret i1 %1
229 }
230
231 define i1 @trunc_i64_to_i1(i64 %a) {
232 ; RV32I-LABEL: trunc_i64_to_i1:
233 ; RV32I: # %bb.0:
234 ; RV32I-NEXT: ret
235 %1 = trunc i64 %a to i1
236 ret i1 %1
237 }
238
239 define i8 @trunc_i16_to_i8(i16 %a) {
240 ; RV32I-LABEL: trunc_i16_to_i8:
241 ; RV32I: # %bb.0:
242 ; RV32I-NEXT: ret
243 %1 = trunc i16 %a to i8
244 ret i8 %1
245 }
246
247 define i8 @trunc_i32_to_i8(i32 %a) {
248 ; RV32I-LABEL: trunc_i32_to_i8:
249 ; RV32I: # %bb.0:
250 ; RV32I-NEXT: ret
251 %1 = trunc i32 %a to i8
252 ret i8 %1
253 }
254
255 define i8 @trunc_i64_to_i8(i64 %a) {
256 ; RV32I-LABEL: trunc_i64_to_i8:
257 ; RV32I: # %bb.0:
258 ; RV32I-NEXT: ret
259 %1 = trunc i64 %a to i8
260 ret i8 %1
261 }
262
263 define i16 @trunc_i32_to_i16(i32 %a) {
264 ; RV32I-LABEL: trunc_i32_to_i16:
265 ; RV32I: # %bb.0:
266 ; RV32I-NEXT: ret
267 %1 = trunc i32 %a to i16
268 ret i16 %1
269 }
270
271 define i16 @trunc_i64_to_i16(i64 %a) {
272 ; RV32I-LABEL: trunc_i64_to_i16:
273 ; RV32I: # %bb.0:
274 ; RV32I-NEXT: ret
275 %1 = trunc i64 %a to i16
276 ret i16 %1
277 }
278
279 define i32 @trunc_i64_to_i32(i64 %a) {
280 ; RV32I-LABEL: trunc_i64_to_i32:
281 ; RV32I: # %bb.0:
282 ; RV32I-NEXT: ret
283 %1 = trunc i64 %a to i32
284 ret i32 %1
285 }