Mercurial > hg > CbC > CbC_llvm
comparison test/CodeGen/X86/rot16.ll @ 134:3a76565eade5 LLVM5.0.1
update 5.0.1
author | mir3636 |
---|---|
date | Sat, 17 Feb 2018 09:57:20 +0900 |
parents | 803732b1fca8 |
children | c2174574ed3a |
comparison
equal
deleted
inserted
replaced
133:c60214abe0e8 | 134:3a76565eade5 |
---|---|
2 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32 | 2 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32 |
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 | 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 |
4 | 4 |
5 define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind { | 5 define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind { |
6 ; X32-LABEL: foo: | 6 ; X32-LABEL: foo: |
7 ; X32: # BB#0: | 7 ; X32: # %bb.0: |
8 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl | 8 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl |
9 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 9 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
10 ; X32-NEXT: rolw %cl, %ax | 10 ; X32-NEXT: rolw %cl, %ax |
11 ; X32-NEXT: retl | 11 ; X32-NEXT: retl |
12 ; | 12 ; |
13 ; X64-LABEL: foo: | 13 ; X64-LABEL: foo: |
14 ; X64: # BB#0: | 14 ; X64: # %bb.0: |
15 ; X64-NEXT: movl %edx, %ecx | 15 ; X64-NEXT: movl %edx, %ecx |
16 ; X64-NEXT: shldw %cl, %di, %di | 16 ; X64-NEXT: shldw %cl, %di, %di |
17 ; X64-NEXT: movl %edi, %eax | 17 ; X64-NEXT: movl %edi, %eax |
18 ; X64-NEXT: retq | 18 ; X64-NEXT: retq |
19 %t0 = shl i16 %x, %z | 19 %t0 = shl i16 %x, %z |
23 ret i16 %t3 | 23 ret i16 %t3 |
24 } | 24 } |
25 | 25 |
26 define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind { | 26 define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind { |
27 ; X32-LABEL: bar: | 27 ; X32-LABEL: bar: |
28 ; X32: # BB#0: | 28 ; X32: # %bb.0: |
29 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl | 29 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl |
30 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %edx | 30 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %edx |
31 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 31 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
32 ; X32-NEXT: shldw %cl, %dx, %ax | 32 ; X32-NEXT: shldw %cl, %dx, %ax |
33 ; X32-NEXT: retl | 33 ; X32-NEXT: retl |
34 ; | 34 ; |
35 ; X64-LABEL: bar: | 35 ; X64-LABEL: bar: |
36 ; X64: # BB#0: | 36 ; X64: # %bb.0: |
37 ; X64-NEXT: movl %edx, %ecx | 37 ; X64-NEXT: movl %edx, %ecx |
38 ; X64-NEXT: shldw %cl, %di, %si | 38 ; X64-NEXT: shldw %cl, %di, %si |
39 ; X64-NEXT: movl %esi, %eax | 39 ; X64-NEXT: movl %esi, %eax |
40 ; X64-NEXT: retq | 40 ; X64-NEXT: retq |
41 %t0 = shl i16 %y, %z | 41 %t0 = shl i16 %y, %z |
45 ret i16 %t3 | 45 ret i16 %t3 |
46 } | 46 } |
47 | 47 |
48 define i16 @un(i16 %x, i16 %y, i16 %z) nounwind { | 48 define i16 @un(i16 %x, i16 %y, i16 %z) nounwind { |
49 ; X32-LABEL: un: | 49 ; X32-LABEL: un: |
50 ; X32: # BB#0: | 50 ; X32: # %bb.0: |
51 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl | 51 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl |
52 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 52 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
53 ; X32-NEXT: rorw %cl, %ax | 53 ; X32-NEXT: rorw %cl, %ax |
54 ; X32-NEXT: retl | 54 ; X32-NEXT: retl |
55 ; | 55 ; |
56 ; X64-LABEL: un: | 56 ; X64-LABEL: un: |
57 ; X64: # BB#0: | 57 ; X64: # %bb.0: |
58 ; X64-NEXT: movl %edx, %ecx | 58 ; X64-NEXT: movl %edx, %ecx |
59 ; X64-NEXT: shrdw %cl, %di, %di | 59 ; X64-NEXT: shrdw %cl, %di, %di |
60 ; X64-NEXT: movl %edi, %eax | 60 ; X64-NEXT: movl %edi, %eax |
61 ; X64-NEXT: retq | 61 ; X64-NEXT: retq |
62 %t0 = lshr i16 %x, %z | 62 %t0 = lshr i16 %x, %z |
66 ret i16 %t3 | 66 ret i16 %t3 |
67 } | 67 } |
68 | 68 |
69 define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind { | 69 define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind { |
70 ; X32-LABEL: bu: | 70 ; X32-LABEL: bu: |
71 ; X32: # BB#0: | 71 ; X32: # %bb.0: |
72 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl | 72 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl |
73 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %edx | 73 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %edx |
74 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 74 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
75 ; X32-NEXT: shrdw %cl, %dx, %ax | 75 ; X32-NEXT: shrdw %cl, %dx, %ax |
76 ; X32-NEXT: retl | 76 ; X32-NEXT: retl |
77 ; | 77 ; |
78 ; X64-LABEL: bu: | 78 ; X64-LABEL: bu: |
79 ; X64: # BB#0: | 79 ; X64: # %bb.0: |
80 ; X64-NEXT: movl %edx, %ecx | 80 ; X64-NEXT: movl %edx, %ecx |
81 ; X64-NEXT: shrdw %cl, %di, %si | 81 ; X64-NEXT: shrdw %cl, %di, %si |
82 ; X64-NEXT: movl %esi, %eax | 82 ; X64-NEXT: movl %esi, %eax |
83 ; X64-NEXT: retq | 83 ; X64-NEXT: retq |
84 %t0 = lshr i16 %y, %z | 84 %t0 = lshr i16 %y, %z |
88 ret i16 %t3 | 88 ret i16 %t3 |
89 } | 89 } |
90 | 90 |
91 define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind { | 91 define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind { |
92 ; X32-LABEL: xfoo: | 92 ; X32-LABEL: xfoo: |
93 ; X32: # BB#0: | 93 ; X32: # %bb.0: |
94 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 94 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
95 ; X32-NEXT: rolw $5, %ax | 95 ; X32-NEXT: rolw $5, %ax |
96 ; X32-NEXT: retl | 96 ; X32-NEXT: retl |
97 ; | 97 ; |
98 ; X64-LABEL: xfoo: | 98 ; X64-LABEL: xfoo: |
99 ; X64: # BB#0: | 99 ; X64: # %bb.0: |
100 ; X64-NEXT: rolw $5, %di | 100 ; X64-NEXT: rolw $5, %di |
101 ; X64-NEXT: movl %edi, %eax | 101 ; X64-NEXT: movl %edi, %eax |
102 ; X64-NEXT: retq | 102 ; X64-NEXT: retq |
103 %t0 = lshr i16 %x, 11 | 103 %t0 = lshr i16 %x, 11 |
104 %t1 = shl i16 %x, 5 | 104 %t1 = shl i16 %x, 5 |
106 ret i16 %t2 | 106 ret i16 %t2 |
107 } | 107 } |
108 | 108 |
109 define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind { | 109 define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind { |
110 ; X32-LABEL: xbar: | 110 ; X32-LABEL: xbar: |
111 ; X32: # BB#0: | 111 ; X32: # %bb.0: |
112 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx | 112 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx |
113 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 113 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
114 ; X32-NEXT: shldw $5, %cx, %ax | 114 ; X32-NEXT: shldw $5, %cx, %ax |
115 ; X32-NEXT: retl | 115 ; X32-NEXT: retl |
116 ; | 116 ; |
117 ; X64-LABEL: xbar: | 117 ; X64-LABEL: xbar: |
118 ; X64: # BB#0: | 118 ; X64: # %bb.0: |
119 ; X64-NEXT: shldw $5, %di, %si | 119 ; X64-NEXT: shldw $5, %di, %si |
120 ; X64-NEXT: movl %esi, %eax | 120 ; X64-NEXT: movl %esi, %eax |
121 ; X64-NEXT: retq | 121 ; X64-NEXT: retq |
122 %t0 = shl i16 %y, 5 | 122 %t0 = shl i16 %y, 5 |
123 %t1 = lshr i16 %x, 11 | 123 %t1 = lshr i16 %x, 11 |
125 ret i16 %t2 | 125 ret i16 %t2 |
126 } | 126 } |
127 | 127 |
128 define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind { | 128 define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind { |
129 ; X32-LABEL: xun: | 129 ; X32-LABEL: xun: |
130 ; X32: # BB#0: | 130 ; X32: # %bb.0: |
131 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 131 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
132 ; X32-NEXT: rolw $11, %ax | 132 ; X32-NEXT: rolw $11, %ax |
133 ; X32-NEXT: retl | 133 ; X32-NEXT: retl |
134 ; | 134 ; |
135 ; X64-LABEL: xun: | 135 ; X64-LABEL: xun: |
136 ; X64: # BB#0: | 136 ; X64: # %bb.0: |
137 ; X64-NEXT: rolw $11, %di | 137 ; X64-NEXT: rolw $11, %di |
138 ; X64-NEXT: movl %edi, %eax | 138 ; X64-NEXT: movl %edi, %eax |
139 ; X64-NEXT: retq | 139 ; X64-NEXT: retq |
140 %t0 = lshr i16 %x, 5 | 140 %t0 = lshr i16 %x, 5 |
141 %t1 = shl i16 %x, 11 | 141 %t1 = shl i16 %x, 11 |
143 ret i16 %t2 | 143 ret i16 %t2 |
144 } | 144 } |
145 | 145 |
146 define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind { | 146 define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind { |
147 ; X32-LABEL: xbu: | 147 ; X32-LABEL: xbu: |
148 ; X32: # BB#0: | 148 ; X32: # %bb.0: |
149 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx | 149 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx |
150 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax | 150 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
151 ; X32-NEXT: shldw $11, %cx, %ax | 151 ; X32-NEXT: shldw $11, %cx, %ax |
152 ; X32-NEXT: retl | 152 ; X32-NEXT: retl |
153 ; | 153 ; |
154 ; X64-LABEL: xbu: | 154 ; X64-LABEL: xbu: |
155 ; X64: # BB#0: | 155 ; X64: # %bb.0: |
156 ; X64-NEXT: shldw $11, %si, %di | 156 ; X64-NEXT: shldw $11, %si, %di |
157 ; X64-NEXT: movl %edi, %eax | 157 ; X64-NEXT: movl %edi, %eax |
158 ; X64-NEXT: retq | 158 ; X64-NEXT: retq |
159 %t0 = lshr i16 %y, 5 | 159 %t0 = lshr i16 %y, 5 |
160 %t1 = shl i16 %x, 11 | 160 %t1 = shl i16 %x, 11 |