comparison unittests/Transforms/Utils/Local.cpp @ 134:3a76565eade5 LLVM5.0.1

update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 803732b1fca8
children
comparison
equal deleted inserted replaced
133:c60214abe0e8 134:3a76565eade5
98 // downstream. 98 // downstream.
99 EXPECT_TRUE(EliminateDuplicatePHINodes(BB)); 99 EXPECT_TRUE(EliminateDuplicatePHINodes(BB));
100 EXPECT_EQ(3U, BB->size()); 100 EXPECT_EQ(3U, BB->size());
101 } 101 }
102 102
103 std::unique_ptr<Module> parseIR(LLVMContext &C, const char *IR) { 103 static std::unique_ptr<Module> parseIR(LLVMContext &C, const char *IR) {
104 SMDiagnostic Err; 104 SMDiagnostic Err;
105 std::unique_ptr<Module> Mod = parseAssemblyString(IR, Err, C); 105 std::unique_ptr<Module> Mod = parseAssemblyString(IR, Err, C);
106 if (!Mod) 106 if (!Mod)
107 Err.print("UtilsTests", errs()); 107 Err.print("UtilsTests", errs());
108 return Mod; 108 return Mod;
155 ASSERT_TRUE(Inst); 155 ASSERT_TRUE(Inst);
156 auto *DII = dyn_cast<DbgDeclareInst>(Inst); 156 auto *DII = dyn_cast<DbgDeclareInst>(Inst);
157 ASSERT_TRUE(DII); 157 ASSERT_TRUE(DII);
158 Value *NewBase = Constant::getNullValue(Type::getInt32PtrTy(C)); 158 Value *NewBase = Constant::getNullValue(Type::getInt32PtrTy(C));
159 DIBuilder DIB(*M); 159 DIBuilder DIB(*M);
160 replaceDbgDeclare(AI, NewBase, DII, DIB, /*Deref=*/false, /*Offset=*/0); 160 replaceDbgDeclare(AI, NewBase, DII, DIB, DIExpression::NoDeref, 0,
161 DIExpression::NoDeref);
161 162
162 // There should be exactly two dbg.declares. 163 // There should be exactly two dbg.declares.
163 int Declares = 0; 164 int Declares = 0;
164 for (const Instruction &I : F->front()) 165 for (const Instruction &I : F->front())
165 if (isa<DbgDeclareInst>(I)) 166 if (isa<DbgDeclareInst>(I))
209 MergeBasicBlockIntoOnlyPred(BB, DT); 210 MergeBasicBlockIntoOnlyPred(BB, DT);
210 } 211 }
211 EXPECT_TRUE(DT->verify()); 212 EXPECT_TRUE(DT->verify());
212 }); 213 });
213 } 214 }
215
216 TEST(Local, ConstantFoldTerminator) {
217 LLVMContext C;
218
219 std::unique_ptr<Module> M = parseIR(
220 C,
221 "define void @br_same_dest() {\n"
222 "entry:\n"
223 " br i1 false, label %bb0, label %bb0\n"
224 "bb0:\n"
225 " ret void\n"
226 "}\n"
227 "\n"
228 "define void @br_different_dest() {\n"
229 "entry:\n"
230 " br i1 true, label %bb0, label %bb1\n"
231 "bb0:\n"
232 " br label %exit\n"
233 "bb1:\n"
234 " br label %exit\n"
235 "exit:\n"
236 " ret void\n"
237 "}\n"
238 "\n"
239 "define void @switch_2_different_dest() {\n"
240 "entry:\n"
241 " switch i32 0, label %default [ i32 0, label %bb0 ]\n"
242 "default:\n"
243 " ret void\n"
244 "bb0:\n"
245 " ret void\n"
246 "}\n"
247 "define void @switch_2_different_dest_default() {\n"
248 "entry:\n"
249 " switch i32 1, label %default [ i32 0, label %bb0 ]\n"
250 "default:\n"
251 " ret void\n"
252 "bb0:\n"
253 " ret void\n"
254 "}\n"
255 "define void @switch_3_different_dest() {\n"
256 "entry:\n"
257 " switch i32 0, label %default [ i32 0, label %bb0\n"
258 " i32 1, label %bb1 ]\n"
259 "default:\n"
260 " ret void\n"
261 "bb0:\n"
262 " ret void\n"
263 "bb1:\n"
264 " ret void\n"
265 "}\n"
266 "\n"
267 "define void @switch_variable_2_default_dest(i32 %arg) {\n"
268 "entry:\n"
269 " switch i32 %arg, label %default [ i32 0, label %default ]\n"
270 "default:\n"
271 " ret void\n"
272 "}\n"
273 "\n"
274 "define void @switch_constant_2_default_dest() {\n"
275 "entry:\n"
276 " switch i32 1, label %default [ i32 0, label %default ]\n"
277 "default:\n"
278 " ret void\n"
279 "}\n"
280 "\n"
281 "define void @switch_constant_3_repeated_dest() {\n"
282 "entry:\n"
283 " switch i32 0, label %default [ i32 0, label %bb0\n"
284 " i32 1, label %bb0 ]\n"
285 " bb0:\n"
286 " ret void\n"
287 "default:\n"
288 " ret void\n"
289 "}\n"
290 "\n"
291 "define void @indirectbr() {\n"
292 "entry:\n"
293 " indirectbr i8* blockaddress(@indirectbr, %bb0), [label %bb0, label %bb1]\n"
294 "bb0:\n"
295 " ret void\n"
296 "bb1:\n"
297 " ret void\n"
298 "}\n"
299 "\n"
300 "define void @indirectbr_repeated() {\n"
301 "entry:\n"
302 " indirectbr i8* blockaddress(@indirectbr_repeated, %bb0), [label %bb0, label %bb0]\n"
303 "bb0:\n"
304 " ret void\n"
305 "}\n"
306 "\n"
307 "define void @indirectbr_unreachable() {\n"
308 "entry:\n"
309 " indirectbr i8* blockaddress(@indirectbr_unreachable, %bb0), [label %bb1]\n"
310 "bb0:\n"
311 " ret void\n"
312 "bb1:\n"
313 " ret void\n"
314 "}\n"
315 "\n"
316 );
317
318 auto CFAllTerminators = [&](Function &F, DominatorTree *DT) {
319 DeferredDominance DDT(*DT);
320 for (Function::iterator I = F.begin(), E = F.end(); I != E;) {
321 BasicBlock *BB = &*I++;
322 ConstantFoldTerminator(BB, true, nullptr, &DDT);
323 }
324
325 EXPECT_TRUE(DDT.flush().verify());
326 };
327
328 runWithDomTree(*M, "br_same_dest", CFAllTerminators);
329 runWithDomTree(*M, "br_different_dest", CFAllTerminators);
330 runWithDomTree(*M, "switch_2_different_dest", CFAllTerminators);
331 runWithDomTree(*M, "switch_2_different_dest_default", CFAllTerminators);
332 runWithDomTree(*M, "switch_3_different_dest", CFAllTerminators);
333 runWithDomTree(*M, "switch_variable_2_default_dest", CFAllTerminators);
334 runWithDomTree(*M, "switch_constant_2_default_dest", CFAllTerminators);
335 runWithDomTree(*M, "switch_constant_3_repeated_dest", CFAllTerminators);
336 runWithDomTree(*M, "indirectbr", CFAllTerminators);
337 runWithDomTree(*M, "indirectbr_repeated", CFAllTerminators);
338 runWithDomTree(*M, "indirectbr_unreachable", CFAllTerminators);
339 }