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comparison CREDITS.TXT @ 77:54457678186b LLVM3.6

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children afa8332a0e37
comparison
equal deleted inserted replaced
34:e874dbf0ad9d 77:54457678186b
105 105
106 N: Rafael Avila de Espindola 106 N: Rafael Avila de Espindola
107 E: rafael.espindola@gmail.com 107 E: rafael.espindola@gmail.com
108 D: The ARM backend 108 D: The ARM backend
109 109
110 N: Dave Estes
111 E: cestes@codeaurora.org
112 D: AArch64 machine description for Cortex-A53
113
110 N: Alkis Evlogimenos 114 N: Alkis Evlogimenos
111 E: alkis@evlogimenos.com 115 E: alkis@evlogimenos.com
112 D: Linear scan register allocator, many codegen improvements, Java frontend 116 D: Linear scan register allocator, many codegen improvements, Java frontend
113 117
114 N: Hal Finkel 118 N: Hal Finkel
115 E: hfinkel@anl.gov 119 E: hfinkel@anl.gov
116 D: Basic-block autovectorization, PowerPC backend improvements 120 D: Basic-block autovectorization, PowerPC backend improvements
121
122 N: Eric Fiselier
123 E: eric@efcs.ca
124 D: LIT patches and documentation.
117 125
118 N: Ryan Flynn 126 N: Ryan Flynn
119 E: pizza@parseerror.com 127 E: pizza@parseerror.com
120 D: Miscellaneous bug fixes 128 D: Miscellaneous bug fixes
121 129
130 E: nicolas.geoffray@lip6.fr 138 E: nicolas.geoffray@lip6.fr
131 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ 139 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
132 D: PPC backend fixes for Linux 140 D: PPC backend fixes for Linux
133 141
134 N: Louis Gerbarg 142 N: Louis Gerbarg
143 E: lgg@apple.com
135 D: Portions of the PowerPC backend 144 D: Portions of the PowerPC backend
136 145
137 N: Saem Ghani 146 N: Saem Ghani
138 E: saemghani@gmail.com 147 E: saemghani@gmail.com
139 D: Callgraph class cleanups 148 D: Callgraph class cleanups
159 E: ggreif@gmail.com 168 E: ggreif@gmail.com
160 D: Improvements for space efficiency 169 D: Improvements for space efficiency
161 170
162 N: James Grosbach 171 N: James Grosbach
163 E: grosbach@apple.com 172 E: grosbach@apple.com
173 I: grosbach
164 D: SjLj exception handling support 174 D: SjLj exception handling support
165 D: General fixes and improvements for the ARM back-end 175 D: General fixes and improvements for the ARM back-end
166 D: MCJIT 176 D: MCJIT
167 D: ARM integrated assembler and assembly parser 177 D: ARM integrated assembler and assembly parser
178 D: Led effort for the backend formerly known as ARM64
168 179
169 N: Lang Hames 180 N: Lang Hames
170 E: lhames@gmail.com 181 E: lhames@gmail.com
171 D: PBQP-based register allocator 182 D: PBQP-based register allocator
172 183
254 N: Sylvestre Ledru 265 N: Sylvestre Ledru
255 E: sylvestre@debian.org 266 E: sylvestre@debian.org
256 W: http://sylvestre.ledru.info/ 267 W: http://sylvestre.ledru.info/
257 W: http://llvm.org/apt/ 268 W: http://llvm.org/apt/
258 D: Debian and Ubuntu packaging 269 D: Debian and Ubuntu packaging
259 D: Continous integration with jenkins 270 D: Continuous integration with jenkins
260 271
261 N: Andrew Lenharth 272 N: Andrew Lenharth
262 E: alenhar2@cs.uiuc.edu 273 E: alenhar2@cs.uiuc.edu
263 W: http://www.lenharth.org/~andrewl/ 274 W: http://www.lenharth.org/~andrewl/
264 D: Alpha backend 275 D: Alpha backend
272 E: tlinth@codeaurora.org 283 E: tlinth@codeaurora.org
273 D: Backend for Qualcomm's Hexagon VLIW processor. 284 D: Backend for Qualcomm's Hexagon VLIW processor.
274 285
275 N: Bruno Cardoso Lopes 286 N: Bruno Cardoso Lopes
276 E: bruno.cardoso@gmail.com 287 E: bruno.cardoso@gmail.com
277 W: http://www.brunocardoso.org 288 I: bruno
278 D: The Mips backend 289 W: http://brunocardoso.cc
290 D: Mips backend
291 D: Random ARM integrated assembler and assembly parser improvements
292 D: General X86 AVX1 support
279 293
280 N: Duraid Madina 294 N: Duraid Madina
281 E: duraid@octopus.com.au 295 E: duraid@octopus.com.au
282 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ 296 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
283 D: IA64 backend, BigBlock register allocator 297 D: IA64 backend, BigBlock register allocator
336 E: dpatel@apple.com 350 E: dpatel@apple.com
337 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate 351 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
338 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements 352 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
339 D: Optimizer improvements, Loop Index Split 353 D: Optimizer improvements, Loop Index Split
340 354
355 N: Ana Pazos
356 E: apazos@codeaurora.org
357 D: Fixes and improvements to the AArch64 backend
358
341 N: Wesley Peck 359 N: Wesley Peck
342 E: peckw@wesleypeck.com 360 E: peckw@wesleypeck.com
343 W: http://wesleypeck.com/ 361 W: http://wesleypeck.com/
344 D: MicroBlaze backend 362 D: MicroBlaze backend
345 363
365 I: arosenberg 383 I: arosenberg
366 D: ARM calling conventions rewrite, hard float support 384 D: ARM calling conventions rewrite, hard float support
367 385
368 N: Chad Rosier 386 N: Chad Rosier
369 E: mcrosier@codeaurora.org 387 E: mcrosier@codeaurora.org
370 D: ARM fast-isel improvements 388 I: mcrosier
371 D: Performance monitoring 389 D: AArch64 fast instruction selection pass
390 D: Fixes and improvements to the ARM fast-isel pass
391 D: Fixes and improvements to the AArch64 backend
372 392
373 N: Nadav Rotem 393 N: Nadav Rotem
374 E: nrotem@apple.com 394 E: nrotem@apple.com
375 D: X86 code generation improvements, Loop Vectorizer. 395 D: X86 code generation improvements, Loop Vectorizer.
376 396
441 D: Bunches of stuff 461 D: Bunches of stuff
442 462
443 N: Bob Wilson 463 N: Bob Wilson
444 E: bob.wilson@acm.org 464 E: bob.wilson@acm.org
445 D: Advanced SIMD (NEON) support in the ARM backend. 465 D: Advanced SIMD (NEON) support in the ARM backend.
466