comparison test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll @ 77:54457678186b LLVM3.6

LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents
children afa8332a0e37
comparison
equal deleted inserted replaced
34:e874dbf0ad9d 77:54457678186b
1 ; RUN: llc < %s -mtriple=arm64-apple-darwin -enable-misched=false | FileCheck %s
2
3 ; rdar://12713765
4 ; Make sure we are not creating stack objects that are assumed to be 64-byte
5 ; aligned.
6 @T3_retval = common global <16 x float> zeroinitializer, align 16
7
8 define void @test(<16 x float>* noalias sret %agg.result) nounwind ssp {
9 entry:
10 ; CHECK: test
11 ; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp, #32]
12 ; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp]
13 ; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], {{\[}}[[BASE:x[0-9]+]], #32]
14 ; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], {{\[}}[[BASE]]]
15 %retval = alloca <16 x float>, align 16
16 %0 = load <16 x float>* @T3_retval, align 16
17 store <16 x float> %0, <16 x float>* %retval
18 %1 = load <16 x float>* %retval
19 store <16 x float> %1, <16 x float>* %agg.result, align 16
20 ret void
21 }