comparison test/CodeGen/AArch64/arm64-indexed-vector-ldst-2.ll @ 77:54457678186b LLVM3.6

LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents
children 60c9769439b8
comparison
equal deleted inserted replaced
34:e874dbf0ad9d 77:54457678186b
1 ; RUN: llc < %s
2
3 ; This used to assert with "Overran sorted position" in AssignTopologicalOrder
4 ; due to a cycle created in performPostLD1Combine.
5
6 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
7 target triple = "arm64-apple-ios7.0.0"
8
9 ; Function Attrs: nounwind ssp
10 define void @f(double* %P1) #0 {
11 entry:
12 %arrayidx4 = getelementptr inbounds double* %P1, i64 1
13 %0 = load double* %arrayidx4, align 8, !tbaa !1
14 %1 = load double* %P1, align 8, !tbaa !1
15 %2 = insertelement <2 x double> undef, double %0, i32 0
16 %3 = insertelement <2 x double> %2, double %1, i32 1
17 %4 = fsub <2 x double> zeroinitializer, %3
18 %5 = fmul <2 x double> undef, %4
19 %6 = extractelement <2 x double> %5, i32 0
20 %cmp168 = fcmp olt double %6, undef
21 br i1 %cmp168, label %if.then172, label %return
22
23 if.then172: ; preds = %cond.end90
24 %7 = tail call i64 @llvm.objectsize.i64.p0i8(i8* undef, i1 false)
25 br label %return
26
27 return: ; preds = %if.then172, %cond.end90, %entry
28 ret void
29 }
30
31 ; Function Attrs: nounwind readnone
32 declare i64 @llvm.objectsize.i64.p0i8(i8*, i1) #1
33
34 attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
35 attributes #1 = { nounwind readnone }
36
37 !1 = metadata !{metadata !2, metadata !2, i64 0}
38 !2 = metadata !{metadata !"double", metadata !3, i64 0}
39 !3 = metadata !{metadata !"omnipotent char", metadata !4, i64 0}
40 !4 = metadata !{metadata !"Simple C/C++ TBAA"}