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comparison test/CodeGen/Mips/cconv/arguments-hard-float.ll @ 77:54457678186b LLVM3.6

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents
children 60c9769439b8
comparison
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34:e874dbf0ad9d 77:54457678186b
1 ; RUN: llc -march=mips -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 --check-prefix=O32BE %s
2 ; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 --check-prefix=O32LE %s
3
4 ; RUN-TODO: llc -march=mips64 -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 %s
5 ; RUN-TODO: llc -march=mips64el -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 %s
6
7 ; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=NEW %s
8 ; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=NEW %s
9
10 ; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=NEW %s
11 ; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=NEW %s
12
13 ; Test the floating point arguments for all ABI's and byte orders as specified
14 ; by section 5 of MD00305 (MIPS ABIs Described).
15 ;
16 ; N32/N64 are identical in this area so their checks have been combined into
17 ; the 'NEW' prefix (the N stands for New).
18
19 @bytes = global [11 x i8] zeroinitializer
20 @dwords = global [11 x i64] zeroinitializer
21 @floats = global [11 x float] zeroinitializer
22 @doubles = global [11 x double] zeroinitializer
23
24 define void @double_args(double %a, double %b, double %c, double %d, double %e,
25 double %f, double %g, double %h, double %i) nounwind {
26 entry:
27 %0 = getelementptr [11 x double]* @doubles, i32 0, i32 1
28 store volatile double %a, double* %0
29 %1 = getelementptr [11 x double]* @doubles, i32 0, i32 2
30 store volatile double %b, double* %1
31 %2 = getelementptr [11 x double]* @doubles, i32 0, i32 3
32 store volatile double %c, double* %2
33 %3 = getelementptr [11 x double]* @doubles, i32 0, i32 4
34 store volatile double %d, double* %3
35 %4 = getelementptr [11 x double]* @doubles, i32 0, i32 5
36 store volatile double %e, double* %4
37 %5 = getelementptr [11 x double]* @doubles, i32 0, i32 6
38 store volatile double %f, double* %5
39 %6 = getelementptr [11 x double]* @doubles, i32 0, i32 7
40 store volatile double %g, double* %6
41 %7 = getelementptr [11 x double]* @doubles, i32 0, i32 8
42 store volatile double %h, double* %7
43 %8 = getelementptr [11 x double]* @doubles, i32 0, i32 9
44 store volatile double %i, double* %8
45 ret void
46 }
47
48 ; ALL-LABEL: double_args:
49 ; We won't test the way the global address is calculated in this test. This is
50 ; just to get the register number for the other checks.
51 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
52 ; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
53
54 ; The first argument is floating point so floating point registers are used.
55 ; The first argument is the same for O32/N32/N64 but the second argument differs
56 ; by register
57 ; ALL-DAG: sdc1 $f12, 8([[R2]])
58 ; O32-DAG: sdc1 $f14, 16([[R2]])
59 ; NEW-DAG: sdc1 $f13, 16([[R2]])
60
61 ; O32 has run out of argument registers and starts using the stack
62 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 16($sp)
63 ; O32-DAG: sdc1 [[F1]], 24([[R2]])
64 ; NEW-DAG: sdc1 $f14, 24([[R2]])
65 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 24($sp)
66 ; O32-DAG: sdc1 [[F1]], 32([[R2]])
67 ; NEW-DAG: sdc1 $f15, 32([[R2]])
68 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 32($sp)
69 ; O32-DAG: sdc1 [[F1]], 40([[R2]])
70 ; NEW-DAG: sdc1 $f16, 40([[R2]])
71 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 40($sp)
72 ; O32-DAG: sdc1 [[F1]], 48([[R2]])
73 ; NEW-DAG: sdc1 $f17, 48([[R2]])
74 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 48($sp)
75 ; O32-DAG: sdc1 [[F1]], 56([[R2]])
76 ; NEW-DAG: sdc1 $f18, 56([[R2]])
77 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 56($sp)
78 ; O32-DAG: sdc1 [[F1]], 64([[R2]])
79 ; NEW-DAG: sdc1 $f19, 64([[R2]])
80
81 ; N32/N64 have run out of registers and start using the stack too
82 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 64($sp)
83 ; O32-DAG: sdc1 [[F1]], 72([[R2]])
84 ; NEW-DAG: ldc1 [[F1:\$f[0-9]+]], 0($sp)
85 ; NEW-DAG: sdc1 [[F1]], 72([[R2]])
86
87 define void @float_args(float %a, float %b, float %c, float %d, float %e,
88 float %f, float %g, float %h, float %i) nounwind {
89 entry:
90 %0 = getelementptr [11 x float]* @floats, i32 0, i32 1
91 store volatile float %a, float* %0
92 %1 = getelementptr [11 x float]* @floats, i32 0, i32 2
93 store volatile float %b, float* %1
94 %2 = getelementptr [11 x float]* @floats, i32 0, i32 3
95 store volatile float %c, float* %2
96 %3 = getelementptr [11 x float]* @floats, i32 0, i32 4
97 store volatile float %d, float* %3
98 %4 = getelementptr [11 x float]* @floats, i32 0, i32 5
99 store volatile float %e, float* %4
100 %5 = getelementptr [11 x float]* @floats, i32 0, i32 6
101 store volatile float %f, float* %5
102 %6 = getelementptr [11 x float]* @floats, i32 0, i32 7
103 store volatile float %g, float* %6
104 %7 = getelementptr [11 x float]* @floats, i32 0, i32 8
105 store volatile float %h, float* %7
106 %8 = getelementptr [11 x float]* @floats, i32 0, i32 9
107 store volatile float %i, float* %8
108 ret void
109 }
110
111 ; ALL-LABEL: float_args:
112 ; We won't test the way the global address is calculated in this test. This is
113 ; just to get the register number for the other checks.
114 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
115 ; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(floats)(
116
117 ; The first argument is floating point so floating point registers are used.
118 ; The first argument is the same for O32/N32/N64 but the second argument differs
119 ; by register
120 ; ALL-DAG: swc1 $f12, 4([[R1]])
121 ; O32-DAG: swc1 $f14, 8([[R1]])
122 ; NEW-DAG: swc1 $f13, 8([[R1]])
123
124 ; O32 has run out of argument registers and (in theory) starts using the stack
125 ; I've yet to find a reference in the documentation about this but GCC uses up
126 ; the remaining two argument slots in the GPR's first. We'll do the same for
127 ; compatibility.
128 ; O32-DAG: sw $6, 12([[R1]])
129 ; NEW-DAG: swc1 $f14, 12([[R1]])
130 ; O32-DAG: sw $7, 16([[R1]])
131 ; NEW-DAG: swc1 $f15, 16([[R1]])
132
133 ; O32 is definitely out of registers now and switches to the stack.
134 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 16($sp)
135 ; O32-DAG: swc1 [[F1]], 20([[R1]])
136 ; NEW-DAG: swc1 $f16, 20([[R1]])
137 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 20($sp)
138 ; O32-DAG: swc1 [[F1]], 24([[R1]])
139 ; NEW-DAG: swc1 $f17, 24([[R1]])
140 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 24($sp)
141 ; O32-DAG: swc1 [[F1]], 28([[R1]])
142 ; NEW-DAG: swc1 $f18, 28([[R1]])
143 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 28($sp)
144 ; O32-DAG: swc1 [[F1]], 32([[R1]])
145 ; NEW-DAG: swc1 $f19, 32([[R1]])
146
147 ; N32/N64 have run out of registers and start using the stack too
148 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 32($sp)
149 ; O32-DAG: swc1 [[F1]], 36([[R1]])
150 ; NEW-DAG: lwc1 [[F1:\$f[0-9]+]], 0($sp)
151 ; NEW-DAG: swc1 [[F1]], 36([[R1]])
152
153
154 define void @double_arg2(i8 %a, double %b) nounwind {
155 entry:
156 %0 = getelementptr [11 x i8]* @bytes, i32 0, i32 1
157 store volatile i8 %a, i8* %0
158 %1 = getelementptr [11 x double]* @doubles, i32 0, i32 1
159 store volatile double %b, double* %1
160 ret void
161 }
162
163 ; ALL-LABEL: double_arg2:
164 ; We won't test the way the global address is calculated in this test. This is
165 ; just to get the register number for the other checks.
166 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
167 ; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
168 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
169 ; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
170
171 ; The first argument is the same in O32/N32/N64.
172 ; ALL-DAG: sb $4, 1([[R1]])
173
174 ; The first argument isn't floating point so floating point registers are not
175 ; used in O32, but N32/N64 will still use them.
176 ; The second slot is insufficiently aligned for double on O32 so it is skipped.
177 ; Also, double occupies two slots on O32 and only one for N32/N64.
178 ; O32LE-DAG: mtc1 $6, [[F1:\$f[0-9]*[02468]+]]
179 ; O32LE-DAG: mtc1 $7, [[F2:\$f[0-9]*[13579]+]]
180 ; O32BE-DAG: mtc1 $6, [[F2:\$f[0-9]*[13579]+]]
181 ; O32BE-DAG: mtc1 $7, [[F1:\$f[0-9]*[02468]+]]
182 ; O32-DAG: sdc1 [[F1]], 8([[R2]])
183 ; NEW-DAG: sdc1 $f13, 8([[R2]])
184
185 define void @float_arg2(i8 %a, float %b) nounwind {
186 entry:
187 %0 = getelementptr [11 x i8]* @bytes, i32 0, i32 1
188 store volatile i8 %a, i8* %0
189 %1 = getelementptr [11 x float]* @floats, i32 0, i32 1
190 store volatile float %b, float* %1
191 ret void
192 }
193
194 ; ALL-LABEL: float_arg2:
195 ; We won't test the way the global address is calculated in this test. This is
196 ; just to get the register number for the other checks.
197 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
198 ; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
199 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
200 ; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(floats)(
201
202 ; The first argument is the same in O32/N32/N64.
203 ; ALL-DAG: sb $4, 1([[R1]])
204
205 ; The first argument isn't floating point so floating point registers are not
206 ; used in O32, but N32/N64 will still use them.
207 ; MD00305 and GCC disagree on this one. MD00305 says that floats are treated
208 ; as 8-byte aligned and occupy two slots on O32. GCC is treating them as 4-byte
209 ; aligned and occupying one slot. We'll use GCC's definition.
210 ; O32-DAG: sw $5, 4([[R2]])
211 ; NEW-DAG: swc1 $f13, 4([[R2]])