Mercurial > hg > CbC > CbC_llvm

comparison lib/Target/Mips/MipsISelLowering.h @ 83:60c9769439b8 LLVM3.7

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents 54457678186b
children afa8332a0e37
comparison
equal deleted inserted replaced
78:af83660cff7b 83:60c9769439b8
13 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===//
14 14
15 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELLOWERING_H 15 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELLOWERING_H
16 #define LLVM_LIB_TARGET_MIPS_MIPSISELLOWERING_H 16 #define LLVM_LIB_TARGET_MIPS_MIPSISELLOWERING_H
17 17
18 #include "MCTargetDesc/MipsABIInfo.h"
18 #include "MCTargetDesc/MipsBaseInfo.h" 19 #include "MCTargetDesc/MipsBaseInfo.h"
19 #include "Mips.h" 20 #include "Mips.h"
20 #include "llvm/CodeGen/CallingConvLower.h" 21 #include "llvm/CodeGen/CallingConvLower.h"
21 #include "llvm/CodeGen/SelectionDAG.h" 22 #include "llvm/CodeGen/SelectionDAG.h"
22 #include "llvm/IR/Function.h" 23 #include "llvm/IR/Function.h"
208 //===--------------------------------------------------------------------===// 209 //===--------------------------------------------------------------------===//
209 // TargetLowering Implementation 210 // TargetLowering Implementation
210 //===--------------------------------------------------------------------===// 211 //===--------------------------------------------------------------------===//
211 class MipsFunctionInfo; 212 class MipsFunctionInfo;
212 class MipsSubtarget; 213 class MipsSubtarget;
214 class MipsCCState;
213 215
214 class MipsTargetLowering : public TargetLowering { 216 class MipsTargetLowering : public TargetLowering {
215 bool isMicroMips; 217 bool isMicroMips;
216 public: 218 public:
217 explicit MipsTargetLowering(MipsTargetMachine &TM, 219 explicit MipsTargetLowering(const MipsTargetMachine &TM,
218 const MipsSubtarget &STI); 220 const MipsSubtarget &STI);
219 221
220 static const MipsTargetLowering *create(MipsTargetMachine &TM, 222 static const MipsTargetLowering *create(const MipsTargetMachine &TM,
221 const MipsSubtarget &STI); 223 const MipsSubtarget &STI);
222 224
223 /// createFastISel - This method returns a target specific FastISel object, 225 /// createFastISel - This method returns a target specific FastISel object,
224 /// or null if the target does not support "fast" ISel. 226 /// or null if the target does not support "fast" ISel.
225 FastISel *createFastISel(FunctionLoweringInfo &funcInfo, 227 FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
257 bool operator()(const char *S1, const char *S2) const { 259 bool operator()(const char *S1, const char *S2) const {
258 return strcmp(S1, S2) < 0; 260 return strcmp(S1, S2) < 0;
259 } 261 }
260 }; 262 };
261 263
264 void HandleByVal(CCState *, unsigned &, unsigned) const override;
265
266 unsigned getRegisterByName(const char* RegName, EVT VT) const override;
267
262 protected: 268 protected:
263 SDValue getGlobalReg(SelectionDAG &DAG, EVT Ty) const; 269 SDValue getGlobalReg(SelectionDAG &DAG, EVT Ty) const;
264 270
265 // This method creates the following nodes, which are necessary for 271 // This method creates the following nodes, which are necessary for
266 // computing a local symbol's address: 272 // computing a local symbol's address:
267 // 273 //
268 // (add (load (wrapper $gp, %got(sym)), %lo(sym)) 274 // (add (load (wrapper $gp, %got(sym)), %lo(sym))
269 template <class NodeTy> 275 template <class NodeTy>
270 SDValue getAddrLocal(NodeTy *N, EVT Ty, SelectionDAG &DAG, 276 SDValue getAddrLocal(NodeTy *N, SDLoc DL, EVT Ty, SelectionDAG &DAG,
271 bool IsN32OrN64) const { 277 bool IsN32OrN64) const {
272 SDLoc DL(N);
273 unsigned GOTFlag = IsN32OrN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT; 278 unsigned GOTFlag = IsN32OrN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT;
274 SDValue GOT = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), 279 SDValue GOT = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty),
275 getTargetNode(N, Ty, DAG, GOTFlag)); 280 getTargetNode(N, Ty, DAG, GOTFlag));
276 SDValue Load = DAG.getLoad(Ty, DL, DAG.getEntryNode(), GOT, 281 SDValue Load = DAG.getLoad(Ty, DL, DAG.getEntryNode(), GOT,
277 MachinePointerInfo::getGOT(), false, false, 282 MachinePointerInfo::getGOT(), false, false,
284 289
285 // This method creates the following nodes, which are necessary for 290 // This method creates the following nodes, which are necessary for
286 // computing a global symbol's address: 291 // computing a global symbol's address:
287 // 292 //
288 // (load (wrapper $gp, %got(sym))) 293 // (load (wrapper $gp, %got(sym)))
289 template<class NodeTy> 294 template <class NodeTy>
290 SDValue getAddrGlobal(NodeTy *N, EVT Ty, SelectionDAG &DAG, 295 SDValue getAddrGlobal(NodeTy *N, SDLoc DL, EVT Ty, SelectionDAG &DAG,
291 unsigned Flag, SDValue Chain, 296 unsigned Flag, SDValue Chain,
292 const MachinePointerInfo &PtrInfo) const { 297 const MachinePointerInfo &PtrInfo) const {
293 SDLoc DL(N);
294 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), 298 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty),
295 getTargetNode(N, Ty, DAG, Flag)); 299 getTargetNode(N, Ty, DAG, Flag));
296 return DAG.getLoad(Ty, DL, Chain, Tgt, PtrInfo, false, false, false, 0); 300 return DAG.getLoad(Ty, DL, Chain, Tgt, PtrInfo, false, false, false, 0);
297 } 301 }
298 302
299 // This method creates the following nodes, which are necessary for 303 // This method creates the following nodes, which are necessary for
300 // computing a global symbol's address in large-GOT mode: 304 // computing a global symbol's address in large-GOT mode:
301 // 305 //
302 // (load (wrapper (add %hi(sym), $gp), %lo(sym))) 306 // (load (wrapper (add %hi(sym), $gp), %lo(sym)))
303 template<class NodeTy> 307 template <class NodeTy>
304 SDValue getAddrGlobalLargeGOT(NodeTy *N, EVT Ty, SelectionDAG &DAG, 308 SDValue getAddrGlobalLargeGOT(NodeTy *N, SDLoc DL, EVT Ty,
305 unsigned HiFlag, unsigned LoFlag, 309 SelectionDAG &DAG, unsigned HiFlag,
306 SDValue Chain, 310 unsigned LoFlag, SDValue Chain,
307 const MachinePointerInfo &PtrInfo) const { 311 const MachinePointerInfo &PtrInfo) const {
308 SDLoc DL(N); 312 SDValue Hi =
309 SDValue Hi = DAG.getNode(MipsISD::Hi, DL, Ty, 313 DAG.getNode(MipsISD::Hi, DL, Ty, getTargetNode(N, Ty, DAG, HiFlag));
310 getTargetNode(N, Ty, DAG, HiFlag));
311 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty)); 314 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty));
312 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi, 315 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi,
313 getTargetNode(N, Ty, DAG, LoFlag)); 316 getTargetNode(N, Ty, DAG, LoFlag));
314 return DAG.getLoad(Ty, DL, Chain, Wrapper, PtrInfo, false, false, false, 317 return DAG.getLoad(Ty, DL, Chain, Wrapper, PtrInfo, false, false, false,
315 0); 318 0);
317 320
318 // This method creates the following nodes, which are necessary for 321 // This method creates the following nodes, which are necessary for
319 // computing a symbol's address in non-PIC mode: 322 // computing a symbol's address in non-PIC mode:
320 // 323 //
321 // (add %hi(sym), %lo(sym)) 324 // (add %hi(sym), %lo(sym))
322 template<class NodeTy> 325 template <class NodeTy>
323 SDValue getAddrNonPIC(NodeTy *N, EVT Ty, SelectionDAG &DAG) const { 326 SDValue getAddrNonPIC(NodeTy *N, SDLoc DL, EVT Ty,
324 SDLoc DL(N); 327 SelectionDAG &DAG) const {
325 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI); 328 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI);
326 SDValue Lo = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO); 329 SDValue Lo = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO);
327 return DAG.getNode(ISD::ADD, DL, Ty, 330 return DAG.getNode(ISD::ADD, DL, Ty,
328 DAG.getNode(MipsISD::Hi, DL, Ty, Hi), 331 DAG.getNode(MipsISD::Hi, DL, Ty, Hi),
329 DAG.getNode(MipsISD::Lo, DL, Ty, Lo)); 332 DAG.getNode(MipsISD::Lo, DL, Ty, Lo));
333 }
334
335 // This method creates the following nodes, which are necessary for
336 // computing a symbol's address using gp-relative addressing:
337 //
338 // (add $gp, %gp_rel(sym))
339 template <class NodeTy>
340 SDValue getAddrGPRel(NodeTy *N, SDLoc DL, EVT Ty, SelectionDAG &DAG) const {
341 assert(Ty == MVT::i32);
342 SDValue GPRel = getTargetNode(N, Ty, DAG, MipsII::MO_GPREL);
343 return DAG.getNode(ISD::ADD, DL, Ty,
344 DAG.getRegister(Mips::GP, Ty),
345 DAG.getNode(MipsISD::GPRel, DL, DAG.getVTList(Ty),
346 GPRel));
330 } 347 }
331 348
332 /// This function fills Ops, which is the list of operands that will later 349 /// This function fills Ops, which is the list of operands that will later
333 /// be used when a function call node is created. It also generates 350 /// be used when a function call node is created. It also generates
334 /// copyToReg nodes to set up argument registers. 351 /// copyToReg nodes to set up argument registers.
335 virtual void 352 virtual void
336 getOpndList(SmallVectorImpl<SDValue> &Ops, 353 getOpndList(SmallVectorImpl<SDValue> &Ops,
337 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 354 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
338 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, 355 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
339 CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const; 356 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,
340 357 SDValue Chain) const;
341 /// ByValArgInfo - Byval argument information. 358
342 struct ByValArgInfo {
343 unsigned FirstIdx; // Index of the first register used.
344 unsigned NumRegs; // Number of registers used for this argument.
345 unsigned Address; // Offset of the stack area used to pass this argument.
346
347 ByValArgInfo() : FirstIdx(0), NumRegs(0), Address(0) {}
348 };
349
350 /// MipsCC - This class provides methods used to analyze formal and call
351 /// arguments and inquire about calling convention information.
352 class MipsCC {
353 public:
354 enum SpecialCallingConvType {
355 Mips16RetHelperConv, NoSpecialCallingConv
356 };
357
358 MipsCC(CallingConv::ID CallConv, bool IsO32, bool IsFP64, CCState &Info,
359 SpecialCallingConvType SpecialCallingConv = NoSpecialCallingConv);
360
361
362 void analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
363 bool IsVarArg, bool IsSoftFloat,
364 const SDNode *CallNode,
365 std::vector<ArgListEntry> &FuncArgs);
366 void analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
367 bool IsSoftFloat,
368 Function::const_arg_iterator FuncArg);
369
370 void analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
371 bool IsSoftFloat, const SDNode *CallNode,
372 const Type *RetTy) const;
373
374 void analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
375 bool IsSoftFloat, const Type *RetTy) const;
376
377 const CCState &getCCInfo() const { return CCInfo; }
378
379 /// hasByValArg - Returns true if function has byval arguments.
380 bool hasByValArg() const { return !ByValArgs.empty(); }
381
382 /// regSize - Size (in number of bits) of integer registers.
383 unsigned regSize() const { return IsO32 ? 4 : 8; }
384
385 /// numIntArgRegs - Number of integer registers available for calls.
386 unsigned numIntArgRegs() const;
387
388 /// reservedArgArea - The size of the area the caller reserves for
389 /// register arguments. This is 16-byte if ABI is O32.
390 unsigned reservedArgArea() const;
391
392 /// Return pointer to array of integer argument registers.
393 const MCPhysReg *intArgRegs() const;
394
395 typedef SmallVectorImpl<ByValArgInfo>::const_iterator byval_iterator;
396 byval_iterator byval_begin() const { return ByValArgs.begin(); }
397 byval_iterator byval_end() const { return ByValArgs.end(); }
398
399 private:
400 void handleByValArg(unsigned ValNo, MVT ValVT, MVT LocVT,
401 CCValAssign::LocInfo LocInfo,
402 ISD::ArgFlagsTy ArgFlags);
403
404 /// useRegsForByval - Returns true if the calling convention allows the
405 /// use of registers to pass byval arguments.
406 bool useRegsForByval() const { return CallConv != CallingConv::Fast; }
407
408 /// Return the function that analyzes fixed argument list functions.
409 llvm::CCAssignFn *fixedArgFn() const;
410
411 /// Return the function that analyzes variable argument list functions.
412 llvm::CCAssignFn *varArgFn() const;
413
414 const MCPhysReg *shadowRegs() const;
415
416 void allocateRegs(ByValArgInfo &ByVal, unsigned ByValSize,
417 unsigned Align);
418
419 /// Return the type of the register which is used to pass an argument or
420 /// return a value. This function returns f64 if the argument is an i64
421 /// value which has been generated as a result of softening an f128 value.
422 /// Otherwise, it just returns VT.
423 MVT getRegVT(MVT VT, const Type *OrigTy, const SDNode *CallNode,
424 bool IsSoftFloat) const;
425
426 template<typename Ty>
427 void analyzeReturn(const SmallVectorImpl<Ty> &RetVals, bool IsSoftFloat,
428 const SDNode *CallNode, const Type *RetTy) const;
429
430 CCState &CCInfo;
431 CallingConv::ID CallConv;
432 bool IsO32, IsFP64;
433 SpecialCallingConvType SpecialCallingConv;
434 SmallVector<ByValArgInfo, 2> ByValArgs;
435 };
436 protected: 359 protected:
437 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const; 360 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
438 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const; 361 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const;
439 362
440 // Subtarget Info 363 // Subtarget Info
441 const MipsSubtarget &Subtarget; 364 const MipsSubtarget &Subtarget;
365 // Cache the ABI from the TargetMachine, we use it everywhere.
366 const MipsABIInfo &ABI;
442 367
443 private: 368 private:
444 // Create a TargetGlobalAddress node. 369 // Create a TargetGlobalAddress node.
445 SDValue getTargetNode(GlobalAddressSDNode *N, EVT Ty, SelectionDAG &DAG, 370 SDValue getTargetNode(GlobalAddressSDNode *N, EVT Ty, SelectionDAG &DAG,
446 unsigned Flag) const; 371 unsigned Flag) const;
459 384
460 // Create a TargetConstantPool node. 385 // Create a TargetConstantPool node.
461 SDValue getTargetNode(ConstantPoolSDNode *N, EVT Ty, SelectionDAG &DAG, 386 SDValue getTargetNode(ConstantPoolSDNode *N, EVT Ty, SelectionDAG &DAG,
462 unsigned Flag) const; 387 unsigned Flag) const;
463 388
464 MipsCC::SpecialCallingConvType getSpecialCallingConv(SDValue Callee) const;
465 // Lower Operand helpers 389 // Lower Operand helpers
466 SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 390 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
467 CallingConv::ID CallConv, bool isVarArg, 391 CallingConv::ID CallConv, bool isVarArg,
468 const SmallVectorImpl<ISD::InputArg> &Ins, 392 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl,
469 SDLoc dl, SelectionDAG &DAG, 393 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
470 SmallVectorImpl<SDValue> &InVals, 394 TargetLowering::CallLoweringInfo &CLI) const;
471 const SDNode *CallNode, const Type *RetTy) const;
472 395
473 // Lower Operand specifics 396 // Lower Operand specifics
474 SDValue lowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 397 SDValue lowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
475 SDValue lowerBRCOND(SDValue Op, SelectionDAG &DAG) const; 398 SDValue lowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
476 SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 399 SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
496 SDValue lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const; 419 SDValue lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
497 420
498 /// isEligibleForTailCallOptimization - Check whether the call is eligible 421 /// isEligibleForTailCallOptimization - Check whether the call is eligible
499 /// for tail call optimization. 422 /// for tail call optimization.
500 virtual bool 423 virtual bool
501 isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo, 424 isEligibleForTailCallOptimization(const CCState &CCInfo,
502 unsigned NextStackOffset, 425 unsigned NextStackOffset,
503 const MipsFunctionInfo& FI) const = 0; 426 const MipsFunctionInfo &FI) const = 0;
504 427
505 /// copyByValArg - Copy argument registers which were used to pass a byval 428 /// copyByValArg - Copy argument registers which were used to pass a byval
506 /// argument to the stack. Create a stack frame object for the byval 429 /// argument to the stack. Create a stack frame object for the byval
507 /// argument. 430 /// argument.
508 void copyByValRegs(SDValue Chain, SDLoc DL, 431 void copyByValRegs(SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains,
509 std::vector<SDValue> &OutChains, SelectionDAG &DAG, 432 SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags,
510 const ISD::ArgFlagsTy &Flags,
511 SmallVectorImpl<SDValue> &InVals, 433 SmallVectorImpl<SDValue> &InVals,
512 const Argument *FuncArg, 434 const Argument *FuncArg, unsigned FirstReg,
513 const MipsCC &CC, const ByValArgInfo &ByVal) const; 435 unsigned LastReg, const CCValAssign &VA,
436 MipsCCState &State) const;
514 437
515 /// passByValArg - Pass a byval argument in registers or on stack. 438 /// passByValArg - Pass a byval argument in registers or on stack.
516 void passByValArg(SDValue Chain, SDLoc DL, 439 void passByValArg(SDValue Chain, SDLoc DL,
517 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 440 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
518 SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, 441 SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr,
519 MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, 442 MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
520 const MipsCC &CC, const ByValArgInfo &ByVal, 443 unsigned FirstReg, unsigned LastReg,
521 const ISD::ArgFlagsTy &Flags, bool isLittle) const; 444 const ISD::ArgFlagsTy &Flags, bool isLittle,
445 const CCValAssign &VA) const;
522 446
523 /// writeVarArgRegs - Write variable function arguments passed in registers 447 /// writeVarArgRegs - Write variable function arguments passed in registers
524 /// to the stack. Also create a stack frame object for the first variable 448 /// to the stack. Also create a stack frame object for the first variable
525 /// argument. 449 /// argument.
526 void writeVarArgRegs(std::vector<SDValue> &OutChains, const MipsCC &CC, 450 void writeVarArgRegs(std::vector<SDValue> &OutChains, SDValue Chain,
527 SDValue Chain, SDLoc DL, SelectionDAG &DAG) const; 451 SDLoc DL, SelectionDAG &DAG, CCState &State) const;
528 452
529 SDValue 453 SDValue
530 LowerFormalArguments(SDValue Chain, 454 LowerFormalArguments(SDValue Chain,
531 CallingConv::ID CallConv, bool isVarArg, 455 CallingConv::ID CallConv, bool isVarArg,
532 const SmallVectorImpl<ISD::InputArg> &Ins, 456 const SmallVectorImpl<ISD::InputArg> &Ins,
609 MachineBasicBlock *emitAtomicCmpSwap(MachineInstr *MI, 533 MachineBasicBlock *emitAtomicCmpSwap(MachineInstr *MI,
610 MachineBasicBlock *BB, unsigned Size) const; 534 MachineBasicBlock *BB, unsigned Size) const;
611 MachineBasicBlock *emitAtomicCmpSwapPartword(MachineInstr *MI, 535 MachineBasicBlock *emitAtomicCmpSwapPartword(MachineInstr *MI,
612 MachineBasicBlock *BB, unsigned Size) const; 536 MachineBasicBlock *BB, unsigned Size) const;
613 MachineBasicBlock *emitSEL_D(MachineInstr *MI, MachineBasicBlock *BB) const; 537 MachineBasicBlock *emitSEL_D(MachineInstr *MI, MachineBasicBlock *BB) const;
538 MachineBasicBlock *emitPseudoSELECT(MachineInstr *MI,
539 MachineBasicBlock *BB, bool isFPCmp,
540 unsigned Opc) const;
614 }; 541 };
615 542
616 /// Create MipsTargetLowering objects. 543 /// Create MipsTargetLowering objects.
617 const MipsTargetLowering * 544 const MipsTargetLowering *
618 createMips16TargetLowering(MipsTargetMachine &TM, const MipsSubtarget &STI); 545 createMips16TargetLowering(const MipsTargetMachine &TM,
546 const MipsSubtarget &STI);
619 const MipsTargetLowering * 547 const MipsTargetLowering *
620 createMipsSETargetLowering(MipsTargetMachine &TM, const MipsSubtarget &STI); 548 createMipsSETargetLowering(const MipsTargetMachine &TM,
549 const MipsSubtarget &STI);
621 550
622 namespace Mips { 551 namespace Mips {
623 FastISel *createFastISel(FunctionLoweringInfo &funcInfo, 552 FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
624 const TargetLibraryInfo *libInfo); 553 const TargetLibraryInfo *libInfo);
625 } 554 }