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comparison test/CodeGen/X86/divrem8_ext.ll @ 83:60c9769439b8 LLVM3.7

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LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents
children 7d135dc70f03
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78:af83660cff7b 83:60c9769439b8
1 ; RUN: llc -march=x86-64 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-64
2 ; RUN: llc -march=x86 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-32
3 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
4 target triple = "x86_64-apple-macosx10.10.0"
5
6 define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
7 ; CHECK-LABEL: test_udivrem_zext_ah
8 ; CHECK: divb
9 ; CHECK: movzbl %ah, [[REG_REM:%[a-z0-9]+]]
10 ; CHECK: movb %al, ([[REG_ZPTR:%[a-z0-9]+]])
11 ; CHECK: movl [[REG_REM]], %eax
12 ; CHECK: ret
13 %div = udiv i8 %x, %y
14 store i8 %div, i8* @z
15 %1 = urem i8 %x, %y
16 ret i8 %1
17 }
18
19 define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
20 ; CHECK-LABEL: test_urem_zext_ah
21 ; CHECK: divb
22 ; CHECK: movzbl %ah, %eax
23 ; CHECK: ret
24 %1 = urem i8 %x, %y
25 ret i8 %1
26 }
27
28 define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
29 ; CHECK-LABEL: test_urem_noext_ah
30 ; CHECK: divb [[REG_X:%[a-z0-9]+]]
31 ; CHECK: movzbl %ah, %eax
32 ; CHECK: addb [[REG_X]], %al
33 ; CHECK: ret
34 %1 = urem i8 %x, %y
35 %2 = add i8 %1, %y
36 ret i8 %2
37 }
38
39 define i64 @test_urem_zext64_ah(i8 %x, i8 %y) {
40 ; CHECK-LABEL: test_urem_zext64_ah
41 ; CHECK: divb
42 ; CHECK: movzbl %ah, %eax
43 ; CHECK-32: xorl %edx, %edx
44 ; CHECK: ret
45 %1 = urem i8 %x, %y
46 %2 = zext i8 %1 to i64
47 ret i64 %2
48 }
49
50 define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
51 ; CHECK-LABEL: test_sdivrem_sext_ah
52 ; CHECK: cbtw
53 ; CHECK: idivb
54 ; CHECK: movsbl %ah, [[REG_REM:%[a-z0-9]+]]
55 ; CHECK: movb %al, ([[REG_ZPTR]])
56 ; CHECK: movl [[REG_REM]], %eax
57 ; CHECK: ret
58 %div = sdiv i8 %x, %y
59 store i8 %div, i8* @z
60 %1 = srem i8 %x, %y
61 ret i8 %1
62 }
63
64 define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
65 ; CHECK-LABEL: test_srem_sext_ah
66 ; CHECK: cbtw
67 ; CHECK: idivb
68 ; CHECK: movsbl %ah, %eax
69 ; CHECK: ret
70 %1 = srem i8 %x, %y
71 ret i8 %1
72 }
73
74 define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
75 ; CHECK-LABEL: test_srem_noext_ah
76 ; CHECK: cbtw
77 ; CHECK: idivb [[REG_X:%[a-z0-9]+]]
78 ; CHECK: movsbl %ah, %eax
79 ; CHECK: addb [[REG_X]], %al
80 ; CHECK: ret
81 %1 = srem i8 %x, %y
82 %2 = add i8 %1, %y
83 ret i8 %2
84 }
85
86 define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
87 ; CHECK-LABEL: test_srem_sext64_ah
88 ; CHECK: cbtw
89 ; CHECK: idivb
90 ; CHECK: movsbl %ah, %eax
91 ; CHECK-32: movl %eax, %edx
92 ; CHECK-32: sarl $31, %edx
93 ; CHECK-64: movsbq %al, %rax
94 ; CHECK: ret
95 %1 = srem i8 %x, %y
96 %2 = sext i8 %1 to i64
97 ret i64 %2
98 }
99
100 @z = external global i8