comparison test/CodeGen/X86/mmx-bitcast.ll @ 83:60c9769439b8 LLVM3.7

LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents
children afa8332a0e37
comparison
equal deleted inserted replaced
78:af83660cff7b 83:60c9769439b8
1 ; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
2
3 define i64 @t0(x86_mmx* %p) {
4 ; CHECK-LABEL: t0:
5 ; CHECK: ## BB#0:
6 ; CHECK-NEXT: movq
7 ; CHECK-NEXT: paddq %mm0, %mm0
8 ; CHECK-NEXT: movd %mm0, %rax
9 ; CHECK-NEXT: retq
10 %t = load x86_mmx* %p
11 %u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t)
12 %s = bitcast x86_mmx %u to i64
13 ret i64 %s
14 }
15
16 define i64 @t1(x86_mmx* %p) {
17 ; CHECK-LABEL: t1:
18 ; CHECK: ## BB#0:
19 ; CHECK-NEXT: movq
20 ; CHECK-NEXT: paddd %mm0, %mm0
21 ; CHECK-NEXT: movd %mm0, %rax
22 ; CHECK-NEXT: retq
23 %t = load x86_mmx* %p
24 %u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t)
25 %s = bitcast x86_mmx %u to i64
26 ret i64 %s
27 }
28
29 define i64 @t2(x86_mmx* %p) {
30 ; CHECK-LABEL: t2:
31 ; CHECK: ## BB#0:
32 ; CHECK-NEXT: movq
33 ; CHECK-NEXT: paddw %mm0, %mm0
34 ; CHECK-NEXT: movd %mm0, %rax
35 ; CHECK-NEXT: retq
36 %t = load x86_mmx* %p
37 %u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t)
38 %s = bitcast x86_mmx %u to i64
39 ret i64 %s
40 }
41
42 define i64 @t3(x86_mmx* %p) {
43 ; CHECK-LABEL: t3:
44 ; CHECK: ## BB#0:
45 ; CHECK-NEXT: movq
46 ; CHECK-NEXT: paddb %mm0, %mm0
47 ; CHECK-NEXT: movd %mm0, %rax
48 ; CHECK-NEXT: retq
49 %t = load x86_mmx* %p
50 %u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t)
51 %s = bitcast x86_mmx %u to i64
52 ret i64 %s
53 }
54
55 @R = external global x86_mmx
56
57 define void @t4(<1 x i64> %A, <1 x i64> %B) {
58 ; CHECK-LABEL: t4:
59 ; CHECK: ## BB#0: ## %entry
60 ; CHECK-NEXT: movd
61 ; CHECK-NEXT: movd
62 ; CHECK: retq
63 entry:
64 %tmp2 = bitcast <1 x i64> %A to x86_mmx
65 %tmp3 = bitcast <1 x i64> %B to x86_mmx
66 %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx %tmp2, x86_mmx %tmp3)
67 store x86_mmx %tmp7, x86_mmx* @R
68 tail call void @llvm.x86.mmx.emms()
69 ret void
70 }
71
72 define i64 @t5(i32 %a, i32 %b) nounwind readnone {
73 ; CHECK-LABEL: t5:
74 ; CHECK: ## BB#0:
75 ; CHECK-NEXT: movd
76 ; CHECK-NEXT: movd
77 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
78 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,1,3]
79 ; CHECK-NEXT: movd %xmm0, %rax
80 ; CHECK-NEXT: retq
81 %v0 = insertelement <2 x i32> undef, i32 %a, i32 0
82 %v1 = insertelement <2 x i32> %v0, i32 %b, i32 1
83 %conv = bitcast <2 x i32> %v1 to i64
84 ret i64 %conv
85 }
86
87 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
88
89 define <1 x i64> @t6(i64 %t) {
90 ; CHECK-LABEL: t6:
91 ; CHECK: ## BB#0:
92 ; CHECK-NEXT: movd
93 ; CHECK-NEXT: psllq $48, %mm0
94 ; CHECK-NEXT: movd %mm0, %rax
95 ; CHECK-NEXT: retq
96 %t1 = insertelement <1 x i64> undef, i64 %t, i32 0
97 %t0 = bitcast <1 x i64> %t1 to x86_mmx
98 %t2 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %t0, i32 48)
99 %t3 = bitcast x86_mmx %t2 to <1 x i64>
100 ret <1 x i64> %t3
101 }
102
103 declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
104 declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx)
105 declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx)
106 declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx)
107 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
108 declare void @llvm.x86.mmx.emms()
109