comparison utils/TableGen/SubtargetEmitter.cpp @ 83:60c9769439b8 LLVM3.7

LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents 54457678186b
children afa8332a0e37
comparison
equal deleted inserted replaced
78:af83660cff7b 83:60c9769439b8
384 384
385 // Emit functional units for all the itineraries. 385 // Emit functional units for all the itineraries.
386 for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), 386 for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(),
387 PE = SchedModels.procModelEnd(); PI != PE; ++PI) { 387 PE = SchedModels.procModelEnd(); PI != PE; ++PI) {
388 388
389 if (!ItinsDefSet.insert(PI->ItinsDef)) 389 if (!ItinsDefSet.insert(PI->ItinsDef).second)
390 continue; 390 continue;
391 391
392 std::vector<Record*> FUs = PI->ItinsDef->getValueAsListOfDefs("FU"); 392 std::vector<Record*> FUs = PI->ItinsDef->getValueAsListOfDefs("FU");
393 if (FUs.empty()) 393 if (FUs.empty())
394 continue; 394 continue;
402 << " = 1 << " << j << ";\n"; 402 << " = 1 << " << j << ";\n";
403 403
404 OS << "}\n"; 404 OS << "}\n";
405 405
406 std::vector<Record*> BPs = PI->ItinsDef->getValueAsListOfDefs("BP"); 406 std::vector<Record*> BPs = PI->ItinsDef->getValueAsListOfDefs("BP");
407 if (BPs.size()) { 407 if (!BPs.empty()) {
408 OS << "\n// Pipeline forwarding pathes for itineraries \"" << Name 408 OS << "\n// Pipeline forwarding pathes for itineraries \"" << Name
409 << "\"\n" << "namespace " << Name << "Bypass {\n"; 409 << "\"\n" << "namespace " << Name << "Bypass {\n";
410 410
411 OS << " const unsigned NoBypass = 0;\n"; 411 OS << " const unsigned NoBypass = 0;\n";
412 for (unsigned j = 0, BPN = BPs.size(); j < BPN; ++j) 412 for (unsigned j = 0, BPN = BPs.size(); j < BPN; ++j)
563 ProcItinListsIter = ProcItinLists.begin(); 563 ProcItinListsIter = ProcItinLists.begin();
564 for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), 564 for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(),
565 PE = SchedModels.procModelEnd(); PI != PE; ++PI, ++ProcItinListsIter) { 565 PE = SchedModels.procModelEnd(); PI != PE; ++PI, ++ProcItinListsIter) {
566 566
567 Record *ItinsDef = PI->ItinsDef; 567 Record *ItinsDef = PI->ItinsDef;
568 if (!ItinsDefSet.insert(ItinsDef)) 568 if (!ItinsDefSet.insert(ItinsDef).second)
569 continue; 569 continue;
570 570
571 // Get processor itinerary name 571 // Get processor itinerary name
572 const std::string &Name = ItinsDef->getName(); 572 const std::string &Name = ItinsDef->getName();
573 573