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comparison lib/Target/Hexagon/HexagonBranchRelaxation.cpp @ 148:63bd29f05246

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merged
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 19:46:37 +0900
parents c2174574ed3a
children
comparison
equal deleted inserted replaced
146:3fc4d5c3e21e 148:63bd29f05246
1 //===--- HexagonBranchRelaxation.cpp - Identify and relax long jumps ------===// 1 //===--- HexagonBranchRelaxation.cpp - Identify and relax long jumps ------===//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // 4 // See https://llvm.org/LICENSE.txt for license information.
5 // This file is distributed under the University of Illinois Open Source 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 // License. See LICENSE.TXT for details.
7 // 6 //
8 //===----------------------------------------------------------------------===// 7 //===----------------------------------------------------------------------===//
9 8
10 #define DEBUG_TYPE "hexagon-brelax" 9 #define DEBUG_TYPE "hexagon-brelax"
11 10
88 FunctionPass *llvm::createHexagonBranchRelaxation() { 87 FunctionPass *llvm::createHexagonBranchRelaxation() {
89 return new HexagonBranchRelaxation(); 88 return new HexagonBranchRelaxation();
90 } 89 }
91 90
92 bool HexagonBranchRelaxation::runOnMachineFunction(MachineFunction &MF) { 91 bool HexagonBranchRelaxation::runOnMachineFunction(MachineFunction &MF) {
93 DEBUG(dbgs() << "****** Hexagon Branch Relaxation ******\n"); 92 LLVM_DEBUG(dbgs() << "****** Hexagon Branch Relaxation ******\n");
94 93
95 auto &HST = MF.getSubtarget<HexagonSubtarget>(); 94 auto &HST = MF.getSubtarget<HexagonSubtarget>();
96 HII = HST.getInstrInfo(); 95 HII = HST.getInstrInfo();
97 HRI = HST.getRegisterInfo(); 96 HRI = HST.getRegisterInfo();
98 97
112 // aligned basic block according to the alignment value. 111 // aligned basic block according to the alignment value.
113 int ByteAlign = (1u << B.getAlignment()) - 1; 112 int ByteAlign = (1u << B.getAlignment()) - 1;
114 InstOffset = (InstOffset + ByteAlign) & ~(ByteAlign); 113 InstOffset = (InstOffset + ByteAlign) & ~(ByteAlign);
115 } 114 }
116 OffsetMap[&B] = InstOffset; 115 OffsetMap[&B] = InstOffset;
117 for (auto &MI : B.instrs()) 116 for (auto &MI : B.instrs()) {
118 InstOffset += HII->getSize(MI); 117 InstOffset += HII->getSize(MI);
118 // Assume that all extendable branches will be extended.
119 if (MI.isBranch() && HII->isExtendable(MI))
120 InstOffset += HEXAGON_INSTR_SIZE;
121 }
119 } 122 }
120 } 123 }
121 124
122 /// relaxBranches - For Hexagon, if the jump target/loop label is too far from 125 /// relaxBranches - For Hexagon, if the jump target/loop label is too far from
123 /// the jump/loop instruction then, we need to make sure that we have constant 126 /// the jump/loop instruction then, we need to make sure that we have constant
141 bool HexagonBranchRelaxation::isJumpOutOfRange(MachineInstr &MI, 144 bool HexagonBranchRelaxation::isJumpOutOfRange(MachineInstr &MI,
142 DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset) { 145 DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset) {
143 MachineBasicBlock &B = *MI.getParent(); 146 MachineBasicBlock &B = *MI.getParent();
144 auto FirstTerm = B.getFirstInstrTerminator(); 147 auto FirstTerm = B.getFirstInstrTerminator();
145 if (FirstTerm == B.instr_end()) 148 if (FirstTerm == B.instr_end())
149 return false;
150
151 if (HII->isExtended(MI))
146 return false; 152 return false;
147 153
148 unsigned InstOffset = BlockToInstOffset[&B]; 154 unsigned InstOffset = BlockToInstOffset[&B];
149 unsigned Distance = 0; 155 unsigned Distance = 0;
150 156
191 197
192 for (auto &B : MF) { 198 for (auto &B : MF) {
193 for (auto &MI : B) { 199 for (auto &MI : B) {
194 if (!MI.isBranch() || !isJumpOutOfRange(MI, BlockToInstOffset)) 200 if (!MI.isBranch() || !isJumpOutOfRange(MI, BlockToInstOffset))
195 continue; 201 continue;
196 DEBUG(dbgs() << "Long distance jump. isExtendable(" 202 LLVM_DEBUG(dbgs() << "Long distance jump. isExtendable("
197 << HII->isExtendable(MI) << ") isConstExtended(" 203 << HII->isExtendable(MI) << ") isConstExtended("
198 << HII->isConstExtended(MI) << ") " << MI); 204 << HII->isConstExtended(MI) << ") " << MI);
199 205
200 // Since we have not merged HW loops relaxation into 206 // Since we have not merged HW loops relaxation into
201 // this code (yet), soften our approach for the moment. 207 // this code (yet), soften our approach for the moment.
202 if (!HII->isExtendable(MI) && !HII->isExtended(MI)) { 208 if (!HII->isExtendable(MI) && !HII->isExtended(MI)) {
203 DEBUG(dbgs() << "\tUnderimplemented relax branch instruction.\n"); 209 LLVM_DEBUG(dbgs() << "\tUnderimplemented relax branch instruction.\n");
204 } else { 210 } else {
205 // Find which operand is expandable. 211 // Find which operand is expandable.
206 int ExtOpNum = HII->getCExtOpNum(MI); 212 int ExtOpNum = HII->getCExtOpNum(MI);
207 MachineOperand &MO = MI.getOperand(ExtOpNum); 213 MachineOperand &MO = MI.getOperand(ExtOpNum);
208 // This need to be something we understand. So far we assume all 214 // This need to be something we understand. So far we assume all