comparison lib/Target/X86/X86LegalizerInfo.cpp @ 148:63bd29f05246

merged
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 19:46:37 +0900
parents c2174574ed3a
children
comparison
equal deleted inserted replaced
146:3fc4d5c3e21e 148:63bd29f05246
1 //===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==// 1 //===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // 4 // See https://llvm.org/LICENSE.txt for license information.
5 // This file is distributed under the University of Illinois Open Source 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 // License. See LICENSE.TXT for details.
7 // 6 //
8 //===----------------------------------------------------------------------===// 7 //===----------------------------------------------------------------------===//
9 /// \file 8 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for X86. 9 /// This file implements the targeting of the Machinelegalizer class for X86.
11 /// \todo This should be generated by TableGen. 10 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===//
13 12
14 #include "X86LegalizerInfo.h" 13 #include "X86LegalizerInfo.h"
15 #include "X86Subtarget.h" 14 #include "X86Subtarget.h"
16 #include "X86TargetMachine.h" 15 #include "X86TargetMachine.h"
16 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
17 #include "llvm/CodeGen/TargetOpcodes.h" 17 #include "llvm/CodeGen/TargetOpcodes.h"
18 #include "llvm/CodeGen/ValueTypes.h" 18 #include "llvm/CodeGen/ValueTypes.h"
19 #include "llvm/IR/DerivedTypes.h" 19 #include "llvm/IR/DerivedTypes.h"
20 #include "llvm/IR/Type.h" 20 #include "llvm/IR/Type.h"
21 21
80 G_GEP, 1, widenToLargerTypesUnsupportedOtherwise); 80 G_GEP, 1, widenToLargerTypesUnsupportedOtherwise);
81 setLegalizeScalarToDifferentSizeStrategy( 81 setLegalizeScalarToDifferentSizeStrategy(
82 G_CONSTANT, 0, widenToLargerTypesAndNarrowToLargest); 82 G_CONSTANT, 0, widenToLargerTypesAndNarrowToLargest);
83 83
84 computeTables(); 84 computeTables();
85 verify(*STI.getInstrInfo());
86 }
87
88 bool X86LegalizerInfo::legalizeIntrinsic(MachineInstr &MI,
89 MachineRegisterInfo &MRI,
90 MachineIRBuilder &MIRBuilder) const {
91 switch (MI.getIntrinsicID()) {
92 case Intrinsic::memcpy:
93 case Intrinsic::memset:
94 case Intrinsic::memmove:
95 if (createMemLibcall(MIRBuilder, MRI, MI) ==
96 LegalizerHelper::UnableToLegalize)
97 return false;
98 MI.eraseFromParent();
99 return true;
100 default:
101 break;
102 }
103 return true;
85 } 104 }
86 105
87 void X86LegalizerInfo::setLegalizerInfo32bit() { 106 void X86LegalizerInfo::setLegalizerInfo32bit() {
88 107
89 const LLT p0 = LLT::pointer(0, TM.getPointerSize() * 8); 108 const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0));
90 const LLT s1 = LLT::scalar(1); 109 const LLT s1 = LLT::scalar(1);
91 const LLT s8 = LLT::scalar(8); 110 const LLT s8 = LLT::scalar(8);
92 const LLT s16 = LLT::scalar(16); 111 const LLT s16 = LLT::scalar(16);
93 const LLT s32 = LLT::scalar(32); 112 const LLT s32 = LLT::scalar(32);
94 const LLT s64 = LLT::scalar(64); 113 const LLT s64 = LLT::scalar(64);
122 setAction({G_GLOBAL_VALUE, p0}, Legal); 141 setAction({G_GLOBAL_VALUE, p0}, Legal);
123 142
124 setAction({G_GEP, p0}, Legal); 143 setAction({G_GEP, p0}, Legal);
125 setAction({G_GEP, 1, s32}, Legal); 144 setAction({G_GEP, 1, s32}, Legal);
126 145
146 if (!Subtarget.is64Bit()) {
147 getActionDefinitionsBuilder(G_PTRTOINT)
148 .legalForCartesianProduct({s1, s8, s16, s32}, {p0})
149 .maxScalar(0, s32)
150 .widenScalarToNextPow2(0, /*Min*/ 8);
151 getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}});
152
153 // Shifts and SDIV
154 getActionDefinitionsBuilder(
155 {G_SDIV, G_SREM, G_UDIV, G_UREM})
156 .legalFor({s8, s16, s32})
157 .clampScalar(0, s8, s32);
158
159 getActionDefinitionsBuilder(
160 {G_SHL, G_LSHR, G_ASHR})
161 .legalFor({{s8, s8}, {s16, s8}, {s32, s8}})
162 .clampScalar(0, s8, s32)
163 .clampScalar(1, s8, s8);
164 }
165
127 // Control-flow 166 // Control-flow
128 setAction({G_BRCOND, s1}, Legal); 167 setAction({G_BRCOND, s1}, Legal);
129 168
130 // Constants 169 // Constants
131 for (auto Ty : {s8, s16, s32, p0}) 170 for (auto Ty : {s8, s16, s32, p0})
136 setAction({G_ZEXT, Ty}, Legal); 175 setAction({G_ZEXT, Ty}, Legal);
137 setAction({G_SEXT, Ty}, Legal); 176 setAction({G_SEXT, Ty}, Legal);
138 setAction({G_ANYEXT, Ty}, Legal); 177 setAction({G_ANYEXT, Ty}, Legal);
139 } 178 }
140 setAction({G_ANYEXT, s128}, Legal); 179 setAction({G_ANYEXT, s128}, Legal);
180 getActionDefinitionsBuilder(G_SEXT_INREG).lower();
141 181
142 // Comparison 182 // Comparison
143 setAction({G_ICMP, s1}, Legal); 183 setAction({G_ICMP, s1}, Legal);
144 184
145 for (auto Ty : {s8, s16, s32, p0}) 185 for (auto Ty : {s8, s16, s32, p0})
159 void X86LegalizerInfo::setLegalizerInfo64bit() { 199 void X86LegalizerInfo::setLegalizerInfo64bit() {
160 200
161 if (!Subtarget.is64Bit()) 201 if (!Subtarget.is64Bit())
162 return; 202 return;
163 203
204 const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0));
205 const LLT s1 = LLT::scalar(1);
206 const LLT s8 = LLT::scalar(8);
207 const LLT s16 = LLT::scalar(16);
208 const LLT s32 = LLT::scalar(32);
164 const LLT s64 = LLT::scalar(64); 209 const LLT s64 = LLT::scalar(64);
165 const LLT s128 = LLT::scalar(128); 210 const LLT s128 = LLT::scalar(128);
166 211
167 setAction({G_IMPLICIT_DEF, s64}, Legal); 212 setAction({G_IMPLICIT_DEF, s64}, Legal);
168 // Need to have that, as tryFoldImplicitDef will create this pattern: 213 // Need to have that, as tryFoldImplicitDef will create this pattern:
177 for (unsigned MemOp : {G_LOAD, G_STORE}) 222 for (unsigned MemOp : {G_LOAD, G_STORE})
178 setAction({MemOp, s64}, Legal); 223 setAction({MemOp, s64}, Legal);
179 224
180 // Pointer-handling 225 // Pointer-handling
181 setAction({G_GEP, 1, s64}, Legal); 226 setAction({G_GEP, 1, s64}, Legal);
227 getActionDefinitionsBuilder(G_PTRTOINT)
228 .legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0})
229 .maxScalar(0, s64)
230 .widenScalarToNextPow2(0, /*Min*/ 8);
231 getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s64}});
182 232
183 // Constants 233 // Constants
184 setAction({TargetOpcode::G_CONSTANT, s64}, Legal); 234 setAction({TargetOpcode::G_CONSTANT, s64}, Legal);
185 235
186 // Extensions 236 // Extensions
187 for (unsigned extOp : {G_ZEXT, G_SEXT, G_ANYEXT}) { 237 for (unsigned extOp : {G_ZEXT, G_SEXT, G_ANYEXT}) {
188 setAction({extOp, s64}, Legal); 238 setAction({extOp, s64}, Legal);
189 } 239 }
190 240
241 getActionDefinitionsBuilder(G_SITOFP)
242 .legalForCartesianProduct({s32, s64})
243 .clampScalar(1, s32, s64)
244 .widenScalarToNextPow2(1)
245 .clampScalar(0, s32, s64)
246 .widenScalarToNextPow2(0);
247
248 getActionDefinitionsBuilder(G_FPTOSI)
249 .legalForCartesianProduct({s32, s64})
250 .clampScalar(1, s32, s64)
251 .widenScalarToNextPow2(0)
252 .clampScalar(0, s32, s64)
253 .widenScalarToNextPow2(1);
254
191 // Comparison 255 // Comparison
192 setAction({G_ICMP, 1, s64}, Legal); 256 setAction({G_ICMP, 1, s64}, Legal);
257
258 getActionDefinitionsBuilder(G_FCMP)
259 .legalForCartesianProduct({s8}, {s32, s64})
260 .clampScalar(0, s8, s8)
261 .clampScalar(1, s32, s64)
262 .widenScalarToNextPow2(1);
263
264 // Divisions
265 getActionDefinitionsBuilder(
266 {G_SDIV, G_SREM, G_UDIV, G_UREM})
267 .legalFor({s8, s16, s32, s64})
268 .clampScalar(0, s8, s64);
269
270 // Shifts
271 getActionDefinitionsBuilder(
272 {G_SHL, G_LSHR, G_ASHR})
273 .legalFor({{s8, s8}, {s16, s8}, {s32, s8}, {s64, s8}})
274 .clampScalar(0, s8, s64)
275 .clampScalar(1, s8, s8);
193 276
194 // Merge/Unmerge 277 // Merge/Unmerge
195 setAction({G_MERGE_VALUES, s128}, Legal); 278 setAction({G_MERGE_VALUES, s128}, Legal);
196 setAction({G_UNMERGE_VALUES, 1, s128}, Legal); 279 setAction({G_UNMERGE_VALUES, 1, s128}, Legal);
197 setAction({G_MERGE_VALUES, 1, s128}, Legal); 280 setAction({G_MERGE_VALUES, 1, s128}, Legal);
218 // Constants 301 // Constants
219 setAction({TargetOpcode::G_FCONSTANT, s32}, Legal); 302 setAction({TargetOpcode::G_FCONSTANT, s32}, Legal);
220 303
221 // Merge/Unmerge 304 // Merge/Unmerge
222 for (const auto &Ty : {v4s32, v2s64}) { 305 for (const auto &Ty : {v4s32, v2s64}) {
223 setAction({G_MERGE_VALUES, Ty}, Legal); 306 setAction({G_CONCAT_VECTORS, Ty}, Legal);
224 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); 307 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal);
225 } 308 }
226 setAction({G_MERGE_VALUES, 1, s64}, Legal); 309 setAction({G_MERGE_VALUES, 1, s64}, Legal);
227 setAction({G_UNMERGE_VALUES, s64}, Legal); 310 setAction({G_UNMERGE_VALUES, s64}, Legal);
228 } 311 }
254 setAction({G_MUL, v8s16}, Legal); 337 setAction({G_MUL, v8s16}, Legal);
255 338
256 setAction({G_FPEXT, s64}, Legal); 339 setAction({G_FPEXT, s64}, Legal);
257 setAction({G_FPEXT, 1, s32}, Legal); 340 setAction({G_FPEXT, 1, s32}, Legal);
258 341
342 setAction({G_FPTRUNC, s32}, Legal);
343 setAction({G_FPTRUNC, 1, s64}, Legal);
344
259 // Constants 345 // Constants
260 setAction({TargetOpcode::G_FCONSTANT, s64}, Legal); 346 setAction({TargetOpcode::G_FCONSTANT, s64}, Legal);
261 347
262 // Merge/Unmerge 348 // Merge/Unmerge
263 for (const auto &Ty : 349 for (const auto &Ty :
264 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { 350 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) {
265 setAction({G_MERGE_VALUES, Ty}, Legal); 351 setAction({G_CONCAT_VECTORS, Ty}, Legal);
266 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); 352 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal);
267 } 353 }
268 for (const auto &Ty : {v16s8, v8s16, v4s32, v2s64}) { 354 for (const auto &Ty : {v16s8, v8s16, v4s32, v2s64}) {
269 setAction({G_MERGE_VALUES, 1, Ty}, Legal); 355 setAction({G_CONCAT_VECTORS, 1, Ty}, Legal);
270 setAction({G_UNMERGE_VALUES, Ty}, Legal); 356 setAction({G_UNMERGE_VALUES, Ty}, Legal);
271 } 357 }
272 } 358 }
273 359
274 void X86LegalizerInfo::setLegalizerInfoSSE41() { 360 void X86LegalizerInfo::setLegalizerInfoSSE41() {
311 setAction({G_EXTRACT, Ty}, Legal); 397 setAction({G_EXTRACT, Ty}, Legal);
312 } 398 }
313 // Merge/Unmerge 399 // Merge/Unmerge
314 for (const auto &Ty : 400 for (const auto &Ty :
315 {v32s8, v64s8, v16s16, v32s16, v8s32, v16s32, v4s64, v8s64}) { 401 {v32s8, v64s8, v16s16, v32s16, v8s32, v16s32, v4s64, v8s64}) {
316 setAction({G_MERGE_VALUES, Ty}, Legal); 402 setAction({G_CONCAT_VECTORS, Ty}, Legal);
317 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); 403 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal);
318 } 404 }
319 for (const auto &Ty : 405 for (const auto &Ty :
320 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { 406 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) {
321 setAction({G_MERGE_VALUES, 1, Ty}, Legal); 407 setAction({G_CONCAT_VECTORS, 1, Ty}, Legal);
322 setAction({G_UNMERGE_VALUES, Ty}, Legal); 408 setAction({G_UNMERGE_VALUES, Ty}, Legal);
323 } 409 }
324 } 410 }
325 411
326 void X86LegalizerInfo::setLegalizerInfoAVX2() { 412 void X86LegalizerInfo::setLegalizerInfoAVX2() {
344 for (auto Ty : {v16s16, v8s32}) 430 for (auto Ty : {v16s16, v8s32})
345 setAction({G_MUL, Ty}, Legal); 431 setAction({G_MUL, Ty}, Legal);
346 432
347 // Merge/Unmerge 433 // Merge/Unmerge
348 for (const auto &Ty : {v64s8, v32s16, v16s32, v8s64}) { 434 for (const auto &Ty : {v64s8, v32s16, v16s32, v8s64}) {
349 setAction({G_MERGE_VALUES, Ty}, Legal); 435 setAction({G_CONCAT_VECTORS, Ty}, Legal);
350 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); 436 setAction({G_UNMERGE_VALUES, 1, Ty}, Legal);
351 } 437 }
352 for (const auto &Ty : {v32s8, v16s16, v8s32, v4s64}) { 438 for (const auto &Ty : {v32s8, v16s16, v8s32, v4s64}) {
353 setAction({G_MERGE_VALUES, 1, Ty}, Legal); 439 setAction({G_CONCAT_VECTORS, 1, Ty}, Legal);
354 setAction({G_UNMERGE_VALUES, Ty}, Legal); 440 setAction({G_UNMERGE_VALUES, Ty}, Legal);
355 } 441 }
356 } 442 }
357 443
358 void X86LegalizerInfo::setLegalizerInfoAVX512() { 444 void X86LegalizerInfo::setLegalizerInfoAVX512() {