CbC/CbC_llvm: lib/CodeGen/TargetLoweringBase.cpp comparison

comparison lib/CodeGen/TargetLoweringBase.cpp @ 100:7d135dc70f03 LLVM 3.9

LLVM 3.9

author	Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date	Tue, 26 Jan 2016 22:53:40 +0900
parents	afa8332a0e37
children	1172e4bd9c6f

comparison

equal deleted inserted replaced

-:6418606d0ead
+:7d135dc70f03
 Names[RTLIB::FPROUND_F128_F32] = "__trunctfsf2";
 Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";
 Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";
 Names[RTLIB::FPROUND_F128_F64] = "__trunctfdf2";
 Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";
-Names[RTLIB::FPTOSINT_F32_I8] = "__fixsfqi";
-Names[RTLIB::FPTOSINT_F32_I16] = "__fixsfhi";
 Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";
 Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";
 Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";
-Names[RTLIB::FPTOSINT_F64_I8] = "__fixdfqi";
-Names[RTLIB::FPTOSINT_F64_I16] = "__fixdfhi";
 Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
 Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
 Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
 Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
 Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
 Names[RTLIB::FPTOSINT_F128_I64] = "__fixtfdi";
 Names[RTLIB::FPTOSINT_F128_I128] = "__fixtfti";
 Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";
 Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";
 Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";
-Names[RTLIB::FPTOUINT_F32_I8] = "__fixunssfqi";
-Names[RTLIB::FPTOUINT_F32_I16] = "__fixunssfhi";
 Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";
 Names[RTLIB::FPTOUINT_F32_I64] = "__fixunssfdi";
 Names[RTLIB::FPTOUINT_F32_I128] = "__fixunssfti";
-Names[RTLIB::FPTOUINT_F64_I8] = "__fixunsdfqi";
-Names[RTLIB::FPTOUINT_F64_I16] = "__fixunsdfhi";
 Names[RTLIB::FPTOUINT_F64_I32] = "__fixunsdfsi";
 Names[RTLIB::FPTOUINT_F64_I64] = "__fixunsdfdi";
 Names[RTLIB::FPTOUINT_F64_I128] = "__fixunsdfti";
 Names[RTLIB::FPTOUINT_F80_I32] = "__fixunsxfsi";
 Names[RTLIB::FPTOUINT_F80_I64] = "__fixunsxfdi";
 /// getFPTOSINT - Return the FPTOSINT_*_* value for the given types, or
 /// UNKNOWN_LIBCALL if there is none.
 RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) {
 if (OpVT == MVT::f32) {
-if (RetVT == MVT::i8)
-return FPTOSINT_F32_I8;
-if (RetVT == MVT::i16)
-return FPTOSINT_F32_I16;
 if (RetVT == MVT::i32)
 return FPTOSINT_F32_I32;
 if (RetVT == MVT::i64)
 return FPTOSINT_F32_I64;
 if (RetVT == MVT::i128)
 return FPTOSINT_F32_I128;
 } else if (OpVT == MVT::f64) {
-if (RetVT == MVT::i8)
-return FPTOSINT_F64_I8;
-if (RetVT == MVT::i16)
-return FPTOSINT_F64_I16;
 if (RetVT == MVT::i32)
 return FPTOSINT_F64_I32;
 if (RetVT == MVT::i64)
 return FPTOSINT_F64_I64;
 if (RetVT == MVT::i128)
 /// getFPTOUINT - Return the FPTOUINT_*_* value for the given types, or
 /// UNKNOWN_LIBCALL if there is none.
 RTLIB::Libcall RTLIB::getFPTOUINT(EVT OpVT, EVT RetVT) {
 if (OpVT == MVT::f32) {
-if (RetVT == MVT::i8)
-return FPTOUINT_F32_I8;
-if (RetVT == MVT::i16)
-return FPTOUINT_F32_I16;
 if (RetVT == MVT::i32)
 return FPTOUINT_F32_I32;
 if (RetVT == MVT::i64)
 return FPTOUINT_F32_I64;
 if (RetVT == MVT::i128)
 return FPTOUINT_F32_I128;
 } else if (OpVT == MVT::f64) {
-if (RetVT == MVT::i8)
-return FPTOUINT_F64_I8;
-if (RetVT == MVT::i16)
-return FPTOUINT_F64_I16;
 if (RetVT == MVT::i32)
 return FPTOUINT_F64_I32;
 if (RetVT == MVT::i64)
 return FPTOUINT_F64_I64;
 if (RetVT == MVT::i128)
 PredictableSelectIsExpensive = false;
 MaskAndBranchFoldingIsLegal = false;
 EnableExtLdPromotion = false;
 HasFloatingPointExceptions = true;
 StackPointerRegisterToSaveRestore = 0;
-ExceptionPointerRegister = 0;
-ExceptionSelectorRegister = 0;
 BooleanContents = UndefinedBooleanContent;
 BooleanFloatContents = UndefinedBooleanContent;
 BooleanVectorContents = UndefinedBooleanContent;
 SchedPreferenceInfo = Sched::ILP;
 JumpBufSize = 0;
 JumpBufAlignment = 0;
 MinFunctionAlignment = 0;
 PrefFunctionAlignment = 0;
 PrefLoopAlignment = 0;
+GatherAllAliasesMaxDepth = 6;
 MinStackArgumentAlignment = 1;
 InsertFencesForAtomic = false;
 MinimumJumpTableEntries = 4;
 InitLibcallNames(LibcallRoutineNames, TM.getTargetTriple());
 setOperationAction(ISD::SSUBO, VT, Expand);
 setOperationAction(ISD::UADDO, VT, Expand);
 setOperationAction(ISD::USUBO, VT, Expand);
 setOperationAction(ISD::SMULO, VT, Expand);
 setOperationAction(ISD::UMULO, VT, Expand);
-setOperationAction(ISD::UABSDIFF, VT, Expand);
-setOperationAction(ISD::SABSDIFF, VT, Expand);
+setOperationAction(ISD::BITREVERSE, VT, Expand);
 // These library functions default to expand.
 setOperationAction(ISD::FROUND, VT, Expand);
 // These operations default to expand for vector types.
 if (VT.isVector()) {
 setOperationAction(ISD::FCOPYSIGN, VT, Expand);
 setOperationAction(ISD::ANY_EXTEND_VECTOR_INREG, VT, Expand);
 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, VT, Expand);
 setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, VT, Expand);
 }
+// For most targets @llvm.get.dynamic.area.offest just returns 0.
+setOperationAction(ISD::GET_DYNAMIC_AREA_OFFSET, VT, Expand);
 }
 // Most targets ignore the @llvm.prefetch intrinsic.
 setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
 /// sequence of memory operands that is recognized by PrologEpilogInserter.
 MachineBasicBlock*
 TargetLoweringBase::emitPatchPoint(MachineInstr *MI,
 MachineBasicBlock *MBB) const {
 MachineFunction &MF = *MI->getParent()->getParent();
+MachineFrameInfo &MFI = *MF.getFrameInfo();
+// We're handling multiple types of operands here:
+// PATCHPOINT MetaArgs - live-in, read only, direct
+// STATEPOINT Deopt Spill - live-through, read only, indirect
+// STATEPOINT Deopt Alloca - live-through, read only, direct
+// (We're currently conservative and mark the deopt slots read/write in
+// practice.)
+// STATEPOINT GC Spill - live-through, read/write, indirect
+// STATEPOINT GC Alloca - live-through, read/write, direct
+// The live-in vs live-through is handled already (the live through ones are
+// all stack slots), but we need to handle the different type of stackmap
+// operands and memory effects here.
 // MI changes inside this loop as we grow operands.
 for(unsigned OperIdx = 0; OperIdx != MI->getNumOperands(); ++OperIdx) {
 MachineOperand &MO = MI->getOperand(OperIdx);
 if (!MO.isFI())
 MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), MI->getDesc());
 // Copy operands before the frame-index.
 for (unsigned i = 0; i < OperIdx; ++i)
 MIB.addOperand(MI->getOperand(i));
-// Add frame index operands: direct-mem-ref tag, #FI, offset.
+// Add frame index operands recognized by stackmaps.cpp
-MIB.addImm(StackMaps::DirectMemRefOp);
+if (MFI.isStatepointSpillSlotObjectIndex(FI)) {
-MIB.addOperand(MI->getOperand(OperIdx));
+// indirect-mem-ref tag, size, #FI, offset.
-MIB.addImm(0);
+// Used for spills inserted by StatepointLowering.  This codepath is not
+// used for patchpoints/stackmaps at all, for these spilling is done via
+// foldMemoryOperand callback only.
+assert(MI->getOpcode() == TargetOpcode::STATEPOINT && "sanity");
+MIB.addImm(StackMaps::IndirectMemRefOp);
+MIB.addImm(MFI.getObjectSize(FI));
+MIB.addOperand(MI->getOperand(OperIdx));
+MIB.addImm(0);
+} else {
+// direct-mem-ref tag, #FI, offset.
+// Used by patchpoint, and direct alloca arguments to statepoints
+MIB.addImm(StackMaps::DirectMemRefOp);
+MIB.addOperand(MI->getOperand(OperIdx));
+MIB.addImm(0);
+}
 // Copy the operands after the frame index.
 for (unsigned i = OperIdx + 1; i != MI->getNumOperands(); ++i)
 MIB.addOperand(MI->getOperand(i));
 // Inherit previous memory operands.
 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
 assert(MIB->mayLoad() && "Folded a stackmap use to a non-load!");
 // Add a new memory operand for this FI.
-const MachineFrameInfo &MFI = *MF.getFrameInfo();
 assert(MFI.getObjectOffset(FI) != -1);
 unsigned Flags = MachineMemOperand::MOLoad;
 if (MI->getOpcode() == TargetOpcode::STATEPOINT) {
 Flags |= MachineMemOperand::MOStore;
 RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::i32];
 TransformToType[MVT::f32] = MVT::i32;
 ValueTypeActions.setTypeAction(MVT::f32, TypeSoftenFloat);
 }
+// Decide how to handle f16. If the target does not have native f16 support,
+// promote it to f32, because there are no f16 library calls (except for
+// conversions).
 if (!isTypeLegal(MVT::f16)) {
-// If the target has native f32 support, promote f16 operations to f32.  If
+NumRegistersForVT[MVT::f16] = NumRegistersForVT[MVT::f32];
-// f32 is not supported, generate soft float library calls.
+RegisterTypeForVT[MVT::f16] = RegisterTypeForVT[MVT::f32];
-if (isTypeLegal(MVT::f32)) {
+TransformToType[MVT::f16] = MVT::f32;
-NumRegistersForVT[MVT::f16] = NumRegistersForVT[MVT::f32];
+ValueTypeActions.setTypeAction(MVT::f16, TypePromoteFloat);
-RegisterTypeForVT[MVT::f16] = RegisterTypeForVT[MVT::f32];
-TransformToType[MVT::f16] = MVT::f32;
-ValueTypeActions.setTypeAction(MVT::f16, TypePromoteFloat);
-} else {
-NumRegistersForVT[MVT::f16] = NumRegistersForVT[MVT::i16];
-RegisterTypeForVT[MVT::f16] = RegisterTypeForVT[MVT::i16];
-TransformToType[MVT::f16] = MVT::i16;
-ValueTypeActions.setTypeAction(MVT::f16, TypeSoftenFloat);
-}
 }
 // Loop over all of the vector value types to see which need transformations.
 for (unsigned i = MVT::FIRST_VECTOR_VALUETYPE;
 i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
 case Switch:         return 0;
 case IndirectBr:     return 0;
 case Invoke:         return 0;
 case Resume:         return 0;
 case Unreachable:    return 0;
-case CleanupEndPad:  return 0;
 case CleanupRet:     return 0;
-case CatchEndPad:  return 0;
 case CatchRet:       return 0;
-case CatchPad:     return 0;
+case CatchPad:       return 0;
-case TerminatePad: return 0;
+case CatchSwitch:    return 0;
-case CleanupPad:   return 0;
+case CleanupPad:     return 0;
 case Add:            return ISD::ADD;
 case FAdd:           return ISD::FADD;
 case Sub:            return ISD::SUB;
 case FSub:           return ISD::FSUB;
 case Mul:            return ISD::MUL;
 return std::make_pair(Cost, MTy.getSimpleVT());
 if (LK.first == TypeSplitVector || LK.first == TypeExpandInteger)
 Cost *= 2;
+// Do not loop with f128 type.
+if (MTy == LK.second)
+return std::make_pair(Cost, MTy.getSimpleVT());
 // Keep legalizing the type.
 MTy = LK.second;
 }
+}
+Value *TargetLoweringBase::getSafeStackPointerLocation(IRBuilder<> &IRB) const {
+if (!TM.getTargetTriple().isAndroid())
+return nullptr;
+// Android provides a libc function to retrieve the address of the current
+// thread's unsafe stack pointer.
+Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+Type *StackPtrTy = Type::getInt8PtrTy(M->getContext());
+Value *Fn = M->getOrInsertFunction("__safestack_pointer_address",
+StackPtrTy->getPointerTo(0), nullptr);
+return IRB.CreateCall(Fn);
 }
 //===----------------------------------------------------------------------===//
 //  Loop Strength Reduction hooks
 //===----------------------------------------------------------------------===//

Mercurial > hg > CbC > CbC_llvm

comparison lib/CodeGen/TargetLoweringBase.cpp @ 100:7d135dc70f03 LLVM 3.9