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comparison lib/Target/Mips/MipsMSAInstrInfo.td @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
96:6418606d0ead 100:7d135dc70f03
61 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 61 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
62 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 62 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
63 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 63 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
64 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 64 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
65 65
66 def immZExt1Ptr : ImmLeaf<iPTR, [{return isUInt<1>(Imm);}]>;
67 def immZExt2Ptr : ImmLeaf<iPTR, [{return isUInt<2>(Imm);}]>;
66 def immZExt4Ptr : ImmLeaf<iPTR, [{return isUInt<4>(Imm);}]>; 68 def immZExt4Ptr : ImmLeaf<iPTR, [{return isUInt<4>(Imm);}]>;
67 def immZExt6Ptr : ImmLeaf<iPTR, [{return isUInt<6>(Imm);}]>; 69 def immZExt6Ptr : ImmLeaf<iPTR, [{return isUInt<6>(Imm);}]>;
68 70
69 // Operands 71 // Operands
70 72
71 // The immediate of an LSA instruction needs special handling
72 // as the encoded value should be subtracted by one.
73 def uimm2LSAAsmOperand : AsmOperandClass {
74 let Name = "LSAImm";
75 let ParserMethod = "parseLSAImm";
76 let RenderMethod = "addImmOperands";
77 }
78
79 def LSAImm : Operand<i32> {
80 let PrintMethod = "printUnsignedImm";
81 let EncoderMethod = "getLSAImmEncoding";
82 let DecoderMethod = "DecodeLSAImm";
83 let ParserMatchClass = uimm2LSAAsmOperand;
84 }
85
86 def uimm4 : Operand<i32> {
87 let PrintMethod = "printUnsignedImm8";
88 }
89
90 def uimm4_ptr : Operand<iPTR> { 73 def uimm4_ptr : Operand<iPTR> {
91 let PrintMethod = "printUnsignedImm8"; 74 let PrintMethod = "printUnsignedImm8";
92 } 75 }
93 76
94 def uimm6_ptr : Operand<iPTR> { 77 def uimm6_ptr : Operand<iPTR> {
95 let PrintMethod = "printUnsignedImm8";
96 }
97
98 def uimm8 : Operand<i32> {
99 let PrintMethod = "printUnsignedImm8"; 78 let PrintMethod = "printUnsignedImm8";
100 } 79 }
101 80
102 def simm5 : Operand<i32>; 81 def simm5 : Operand<i32>;
103 82
637 class COPY_S_D_ENC : MSA_ELM_COPY_D_FMT<0b0010, 0b011001>; 616 class COPY_S_D_ENC : MSA_ELM_COPY_D_FMT<0b0010, 0b011001>;
638 617
639 class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 618 class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>;
640 class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 619 class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>;
641 class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 620 class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>;
642 class COPY_U_D_ENC : MSA_ELM_COPY_D_FMT<0b0011, 0b011001>;
643 621
644 class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>; 622 class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>;
645 623
646 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 624 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
647 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 625 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
1193 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1171 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1194 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))]; 1172 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))];
1195 InstrItinClass Itinerary = itin; 1173 InstrItinClass Itinerary = itin;
1196 } 1174 }
1197 1175
1198 // This class is deprecated and will be removed soon. 1176 class MSA_BIT_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1199 class MSA_BIT_B_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1177 Operand ImmOp, ImmLeaf Imm, RegisterOperand ROWD,
1200 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1178 RegisterOperand ROWS = ROWD,
1201 InstrItinClass itin = NoItinerary> { 1179 InstrItinClass itin = NoItinerary> {
1202 dag OutOperandList = (outs ROWD:$wd); 1180 dag OutOperandList = (outs ROWD:$wd);
1203 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1181 dag InOperandList = (ins ROWS:$ws, ImmOp:$m);
1204 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1182 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1205 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1183 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))];
1206 InstrItinClass Itinerary = itin;
1207 }
1208
1209 // This class is deprecated and will be removed soon.
1210 class MSA_BIT_H_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1211 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1212 InstrItinClass itin = NoItinerary> {
1213 dag OutOperandList = (outs ROWD:$wd);
1214 dag InOperandList = (ins ROWS:$ws, uimm4:$m);
1215 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1216 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))];
1217 InstrItinClass Itinerary = itin;
1218 }
1219
1220 // This class is deprecated and will be removed soon.
1221 class MSA_BIT_W_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1222 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1223 InstrItinClass itin = NoItinerary> {
1224 dag OutOperandList = (outs ROWD:$wd);
1225 dag InOperandList = (ins ROWS:$ws, uimm5:$m);
1226 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1227 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))];
1228 InstrItinClass Itinerary = itin;
1229 }
1230
1231 // This class is deprecated and will be removed soon.
1232 class MSA_BIT_D_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1233 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1234 InstrItinClass itin = NoItinerary> {
1235 dag OutOperandList = (outs ROWD:$wd);
1236 dag InOperandList = (ins ROWS:$ws, uimm6:$m);
1237 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1238 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))];
1239 InstrItinClass Itinerary = itin; 1184 InstrItinClass Itinerary = itin;
1240 } 1185 }
1241 1186
1242 class MSA_BIT_BINSXI_DESC_BASE<string instr_asm, ValueType Ty, 1187 class MSA_BIT_BINSXI_DESC_BASE<string instr_asm, ValueType Ty,
1243 ComplexPattern Mask, RegisterOperand ROWD, 1188 ComplexPattern Mask, RegisterOperand ROWD,
1289 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4Ptr:$n))]; 1234 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4Ptr:$n))];
1290 InstrItinClass Itinerary = itin; 1235 InstrItinClass Itinerary = itin;
1291 } 1236 }
1292 1237
1293 class MSA_ELM_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1238 class MSA_ELM_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1294 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1239 RegisterOperand ROWD, RegisterOperand ROWS,
1240 Operand ImmOp, ImmLeaf Imm,
1295 InstrItinClass itin = NoItinerary> { 1241 InstrItinClass itin = NoItinerary> {
1296 dag OutOperandList = (outs ROWD:$wd); 1242 dag OutOperandList = (outs ROWD:$wd);
1297 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, uimm4:$n); 1243 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ImmOp:$n);
1298 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1244 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1299 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws, 1245 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws,
1300 immZExt4:$n))]; 1246 Imm:$n))];
1301 string Constraints = "$wd = $wd_in"; 1247 string Constraints = "$wd = $wd_in";
1302 InstrItinClass Itinerary = itin; 1248 InstrItinClass Itinerary = itin;
1303 } 1249 }
1304 1250
1305 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1251 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy,
1517 bit usesCustomInserter = 1; 1463 bit usesCustomInserter = 1;
1518 string Constraints = "$wd = $wd_in"; 1464 string Constraints = "$wd = $wd_in";
1519 } 1465 }
1520 1466
1521 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1467 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1522 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1468 Operand ImmOp, ImmLeaf Imm, RegisterOperand ROWD,
1469 RegisterOperand ROWS = ROWD,
1523 InstrItinClass itin = NoItinerary> { 1470 InstrItinClass itin = NoItinerary> {
1524 dag OutOperandList = (outs ROWD:$wd); 1471 dag OutOperandList = (outs ROWD:$wd);
1525 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws, uimmz:$n2); 1472 dag InOperandList = (ins ROWD:$wd_in, ImmOp:$n, ROWS:$ws, uimmz:$n2);
1526 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[$n2]"); 1473 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[$n2]");
1527 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1474 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1528 immZExt6:$n, 1475 Imm:$n,
1529 ROWS:$ws, 1476 ROWS:$ws,
1530 immz:$n2))]; 1477 immz:$n2))];
1531 InstrItinClass Itinerary = itin; 1478 InstrItinClass Itinerary = itin;
1532 string Constraints = "$wd = $wd_in"; 1479 string Constraints = "$wd = $wd_in";
1533 } 1480 }
1932 GPR32Opnd, MSA128BOpnd>; 1879 GPR32Opnd, MSA128BOpnd>;
1933 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1880 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1934 GPR32Opnd, MSA128HOpnd>; 1881 GPR32Opnd, MSA128HOpnd>;
1935 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1882 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1936 GPR32Opnd, MSA128WOpnd>; 1883 GPR32Opnd, MSA128WOpnd>;
1937 class COPY_U_D_DESC : MSA_COPY_DESC_BASE<"copy_u.d", vextract_zext_i64, v2i64,
1938 GPR64Opnd, MSA128DOpnd>;
1939 1884
1940 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1885 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
1941 MSA128W>; 1886 MSA128W>;
1942 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1887 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64,
1943 MSA128D>; 1888 MSA128D>;
2344 class INSERT_FW_VIDX64_PSEUDO_DESC : 2289 class INSERT_FW_VIDX64_PSEUDO_DESC :
2345 MSA_INSERT_VIDX_PSEUDO_BASE<vector_insert, v4f32, MSA128WOpnd, FGR32Opnd, GPR64Opnd>; 2290 MSA_INSERT_VIDX_PSEUDO_BASE<vector_insert, v4f32, MSA128WOpnd, FGR32Opnd, GPR64Opnd>;
2346 class INSERT_FD_VIDX64_PSEUDO_DESC : 2291 class INSERT_FD_VIDX64_PSEUDO_DESC :
2347 MSA_INSERT_VIDX_PSEUDO_BASE<vector_insert, v2f64, MSA128DOpnd, FGR64Opnd, GPR64Opnd>; 2292 MSA_INSERT_VIDX_PSEUDO_BASE<vector_insert, v2f64, MSA128DOpnd, FGR64Opnd, GPR64Opnd>;
2348 2293
2349 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", insve_v16i8, 2294 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", insve_v16i8, uimm4, immZExt4,
2350 MSA128BOpnd>; 2295 MSA128BOpnd>;
2351 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", insve_v8i16, 2296 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", insve_v8i16, uimm3, immZExt3,
2352 MSA128HOpnd>; 2297 MSA128HOpnd>;
2353 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", insve_v4i32, 2298 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", insve_v4i32, uimm2, immZExt2,
2354 MSA128WOpnd>; 2299 MSA128WOpnd>;
2355 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", insve_v2i64, 2300 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", insve_v2i64, uimm1, immZExt1,
2356 MSA128DOpnd>; 2301 MSA128DOpnd>;
2357 2302
2358 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2303 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2359 ValueType TyNode, RegisterOperand ROWD, 2304 ValueType TyNode, RegisterOperand ROWD,
2360 Operand MemOpnd = mem_msa, ComplexPattern Addr = addrimm10, 2305 Operand MemOpnd = mem_msa, ComplexPattern Addr = addrimm10,
2379 2324
2380 class LSA_DESC_BASE<string instr_asm, RegisterOperand RORD, 2325 class LSA_DESC_BASE<string instr_asm, RegisterOperand RORD,
2381 RegisterOperand RORS = RORD, RegisterOperand RORT = RORD, 2326 RegisterOperand RORS = RORD, RegisterOperand RORT = RORD,
2382 InstrItinClass itin = NoItinerary > { 2327 InstrItinClass itin = NoItinerary > {
2383 dag OutOperandList = (outs RORD:$rd); 2328 dag OutOperandList = (outs RORD:$rd);
2384 dag InOperandList = (ins RORS:$rs, RORT:$rt, LSAImm:$sa); 2329 dag InOperandList = (ins RORS:$rs, RORT:$rt, uimm2_plus1:$sa);
2385 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $sa"); 2330 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $sa");
2386 list<dag> Pattern = [(set RORD:$rd, (add RORT:$rt, 2331 list<dag> Pattern = [(set RORD:$rd, (add RORT:$rt,
2387 (shl RORS:$rs, 2332 (shl RORS:$rs,
2388 immZExt2Lsa:$sa)))]; 2333 immZExt2Lsa:$sa)))];
2389 InstrItinClass Itinerary = itin; 2334 InstrItinClass Itinerary = itin;
2559 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2504 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>;
2560 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2505 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>;
2561 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2506 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>;
2562 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2507 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>;
2563 2508
2564 class SAT_S_B_DESC : MSA_BIT_B_X_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2509 class SAT_S_B_DESC : MSA_BIT_X_DESC_BASE<"sat_s.b", int_mips_sat_s_b, uimm3,
2565 MSA128BOpnd>; 2510 immZExt3, MSA128BOpnd>;
2566 class SAT_S_H_DESC : MSA_BIT_H_X_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2511 class SAT_S_H_DESC : MSA_BIT_X_DESC_BASE<"sat_s.h", int_mips_sat_s_h, uimm4,
2567 MSA128HOpnd>; 2512 immZExt4, MSA128HOpnd>;
2568 class SAT_S_W_DESC : MSA_BIT_W_X_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2513 class SAT_S_W_DESC : MSA_BIT_X_DESC_BASE<"sat_s.w", int_mips_sat_s_w, uimm5,
2569 MSA128WOpnd>; 2514 immZExt5, MSA128WOpnd>;
2570 class SAT_S_D_DESC : MSA_BIT_D_X_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2515 class SAT_S_D_DESC : MSA_BIT_X_DESC_BASE<"sat_s.d", int_mips_sat_s_d, uimm6,
2571 MSA128DOpnd>; 2516 immZExt6, MSA128DOpnd>;
2572 2517
2573 class SAT_U_B_DESC : MSA_BIT_B_X_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2518 class SAT_U_B_DESC : MSA_BIT_X_DESC_BASE<"sat_u.b", int_mips_sat_u_b, uimm3,
2574 MSA128BOpnd>; 2519 immZExt3, MSA128BOpnd>;
2575 class SAT_U_H_DESC : MSA_BIT_H_X_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2520 class SAT_U_H_DESC : MSA_BIT_X_DESC_BASE<"sat_u.h", int_mips_sat_u_h, uimm4,
2576 MSA128HOpnd>; 2521 immZExt4, MSA128HOpnd>;
2577 class SAT_U_W_DESC : MSA_BIT_W_X_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2522 class SAT_U_W_DESC : MSA_BIT_X_DESC_BASE<"sat_u.w", int_mips_sat_u_w, uimm5,
2578 MSA128WOpnd>; 2523 immZExt5, MSA128WOpnd>;
2579 class SAT_U_D_DESC : MSA_BIT_D_X_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2524 class SAT_U_D_DESC : MSA_BIT_X_DESC_BASE<"sat_u.d", int_mips_sat_u_d, uimm6,
2580 MSA128DOpnd>; 2525 immZExt6, MSA128DOpnd>;
2581 2526
2582 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2527 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>;
2583 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2528 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>;
2584 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2529 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>;
2585 2530
2587 class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2532 class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;
2588 class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2533 class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;
2589 class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2534 class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
2590 2535
2591 class SLDI_B_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.b", int_mips_sldi_b, 2536 class SLDI_B_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.b", int_mips_sldi_b,
2592 MSA128BOpnd>; 2537 MSA128BOpnd, MSA128BOpnd, uimm4,
2538 immZExt4>;
2593 class SLDI_H_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.h", int_mips_sldi_h, 2539 class SLDI_H_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.h", int_mips_sldi_h,
2594 MSA128HOpnd>; 2540 MSA128HOpnd, MSA128HOpnd, uimm3,
2541 immZExt3>;
2595 class SLDI_W_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.w", int_mips_sldi_w, 2542 class SLDI_W_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.w", int_mips_sldi_w,
2596 MSA128WOpnd>; 2543 MSA128WOpnd, MSA128WOpnd, uimm2,
2544 immZExt2>;
2597 class SLDI_D_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.d", int_mips_sldi_d, 2545 class SLDI_D_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.d", int_mips_sldi_d,
2598 MSA128DOpnd>; 2546 MSA128DOpnd, MSA128DOpnd, uimm1,
2547 immZExt1>;
2599 2548
2600 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2549 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
2601 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2550 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
2602 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2551 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>;
2603 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2552 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>;
2646 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2595 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>;
2647 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2596 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>;
2648 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2597 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>;
2649 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2598 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>;
2650 2599
2651 class SRARI_B_DESC : MSA_BIT_B_X_DESC_BASE<"srari.b", int_mips_srari_b, 2600 class SRARI_B_DESC : MSA_BIT_X_DESC_BASE<"srari.b", int_mips_srari_b, uimm3,
2652 MSA128BOpnd>; 2601 immZExt3, MSA128BOpnd>;
2653 class SRARI_H_DESC : MSA_BIT_H_X_DESC_BASE<"srari.h", int_mips_srari_h, 2602 class SRARI_H_DESC : MSA_BIT_X_DESC_BASE<"srari.h", int_mips_srari_h, uimm4,
2654 MSA128HOpnd>; 2603 immZExt4, MSA128HOpnd>;
2655 class SRARI_W_DESC : MSA_BIT_W_X_DESC_BASE<"srari.w", int_mips_srari_w, 2604 class SRARI_W_DESC : MSA_BIT_X_DESC_BASE<"srari.w", int_mips_srari_w, uimm5,
2656 MSA128WOpnd>; 2605 immZExt5, MSA128WOpnd>;
2657 class SRARI_D_DESC : MSA_BIT_D_X_DESC_BASE<"srari.d", int_mips_srari_d, 2606 class SRARI_D_DESC : MSA_BIT_X_DESC_BASE<"srari.d", int_mips_srari_d, uimm6,
2658 MSA128DOpnd>; 2607 immZExt6, MSA128DOpnd>;
2659 2608
2660 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2609 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>;
2661 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2610 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>;
2662 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2611 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>;
2663 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2612 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>;
2674 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2623 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>;
2675 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2624 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>;
2676 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2625 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>;
2677 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2626 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>;
2678 2627
2679 class SRLRI_B_DESC : MSA_BIT_B_X_DESC_BASE<"srlri.b", int_mips_srlri_b, 2628 class SRLRI_B_DESC : MSA_BIT_X_DESC_BASE<"srlri.b", int_mips_srlri_b, uimm3,
2680 MSA128BOpnd>; 2629 immZExt3, MSA128BOpnd>;
2681 class SRLRI_H_DESC : MSA_BIT_H_X_DESC_BASE<"srlri.h", int_mips_srlri_h, 2630 class SRLRI_H_DESC : MSA_BIT_X_DESC_BASE<"srlri.h", int_mips_srlri_h, uimm4,
2682 MSA128HOpnd>; 2631 immZExt4, MSA128HOpnd>;
2683 class SRLRI_W_DESC : MSA_BIT_W_X_DESC_BASE<"srlri.w", int_mips_srlri_w, 2632 class SRLRI_W_DESC : MSA_BIT_X_DESC_BASE<"srlri.w", int_mips_srlri_w, uimm5,
2684 MSA128WOpnd>; 2633 immZExt5, MSA128WOpnd>;
2685 class SRLRI_D_DESC : MSA_BIT_D_X_DESC_BASE<"srlri.d", int_mips_srlri_d, 2634 class SRLRI_D_DESC : MSA_BIT_X_DESC_BASE<"srlri.d", int_mips_srlri_d, uimm6,
2686 MSA128DOpnd>; 2635 immZExt6, MSA128DOpnd>;
2687 2636
2688 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2637 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2689 ValueType TyNode, RegisterOperand ROWD, 2638 ValueType TyNode, RegisterOperand ROWD,
2690 Operand MemOpnd = mem_msa, ComplexPattern Addr = addrimm10, 2639 Operand MemOpnd = mem_msa, ComplexPattern Addr = addrimm10,
2691 InstrItinClass itin = NoItinerary> { 2640 InstrItinClass itin = NoItinerary> {
2993 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2942 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2994 def COPY_S_D : COPY_S_D_ENC, COPY_S_D_DESC, ASE_MSA64; 2943 def COPY_S_D : COPY_S_D_ENC, COPY_S_D_DESC, ASE_MSA64;
2995 2944
2996 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2945 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2997 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2946 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2998 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2947 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC, ASE_MSA64;
2999 def COPY_U_D : COPY_U_D_ENC, COPY_U_D_DESC, ASE_MSA64;
3000 2948
3001 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2949 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC;
3002 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2950 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC;
3003 2951
3004 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2952 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
3784 MSA128W, NoItinerary>; 3732 MSA128W, NoItinerary>;
3785 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3733 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3786 MSA128D, NoItinerary>; 3734 MSA128D, NoItinerary>;
3787 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3735 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3788 MSA128B, NoItinerary>; 3736 MSA128B, NoItinerary>;
3737
3738 // Vector extraction with fixed index.
3739 //
3740 // Extracting 32-bit values on MSA32 should always use COPY_S_W rather than
3741 // COPY_U_W, even for the zero-extended case. This is because our forward
3742 // compatibility strategy is to consider registers to be infinitely
3743 // sign-extended so that a MIPS64 can execute MIPS32 code without getting
3744 // different register values.
3745 def : MSAPat<(vextract_zext_i32 (v4i32 MSA128W:$ws), immZExt2Ptr:$idx),
3746 (COPY_S_W MSA128W:$ws, immZExt2:$idx)>, ASE_MSA_NOT_MSA64;
3747 def : MSAPat<(vextract_zext_i32 (v4f32 MSA128W:$ws), immZExt2Ptr:$idx),
3748 (COPY_S_W MSA128W:$ws, immZExt2:$idx)>, ASE_MSA_NOT_MSA64;
3749
3750 // Extracting 64-bit values on MSA64 should always use COPY_S_D rather than
3751 // COPY_U_D, even for the zero-extended case. This is because our forward
3752 // compatibility strategy is to consider registers to be infinitely
3753 // sign-extended so that a hypothetical MIPS128 would be able to execute MIPS64
3754 // code without getting different register values.
3755 def : MSAPat<(vextract_zext_i64 (v2i64 MSA128D:$ws), immZExt1Ptr:$idx),
3756 (COPY_S_D MSA128D:$ws, immZExt1:$idx)>, ASE_MSA64;
3757 def : MSAPat<(vextract_zext_i64 (v2f64 MSA128D:$ws), immZExt1Ptr:$idx),
3758 (COPY_S_D MSA128D:$ws, immZExt1:$idx)>, ASE_MSA64;
3789 3759
3790 // Vector extraction with variable index 3760 // Vector extraction with variable index
3791 def : MSAPat<(i32 (vextract_sext_i8 v16i8:$ws, i32:$idx)), 3761 def : MSAPat<(i32 (vextract_sext_i8 v16i8:$ws, i32:$idx)),
3792 (SRA (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_B v16i8:$ws, 3762 (SRA (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_B v16i8:$ws,
3793 i32:$idx), 3763 i32:$idx),