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comparison test/CodeGen/AArch64/arm64-neon-copy.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
96:6418606d0ead 100:7d135dc70f03
318 %tmp4 = sext i16 %tmp3 to i32 318 %tmp4 = sext i16 %tmp3 to i32
319 %tmp5 = add i32 %tmp4, %tmp4 319 %tmp5 = add i32 %tmp4, %tmp4
320 ret i32 %tmp5 320 ret i32 %tmp5
321 } 321 }
322 322
323 define i32 @smovx16b(<16 x i8> %tmp1) { 323 define i64 @smovx16b(<16 x i8> %tmp1) {
324 ; CHECK-LABEL: smovx16b: 324 ; CHECK-LABEL: smovx16b:
325 ; CHECK: smov {{[xw][0-9]+}}, {{v[0-9]+}}.b[8] 325 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.b[8]
326 %tmp3 = extractelement <16 x i8> %tmp1, i32 8 326 %tmp3 = extractelement <16 x i8> %tmp1, i32 8
327 %tmp4 = sext i8 %tmp3 to i32 327 %tmp4 = sext i8 %tmp3 to i64
328 %tmp5 = add i32 %tmp4, %tmp4 328 ret i64 %tmp4
329 ret i32 %tmp5 329 }
330 } 330
331 331 define i64 @smovx8h(<8 x i16> %tmp1) {
332 define i32 @smovx8h(<8 x i16> %tmp1) {
333 ; CHECK-LABEL: smovx8h: 332 ; CHECK-LABEL: smovx8h:
334 ; CHECK: smov {{[xw][0-9]+}}, {{v[0-9]+}}.h[2] 333 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.h[2]
335 %tmp3 = extractelement <8 x i16> %tmp1, i32 2 334 %tmp3 = extractelement <8 x i16> %tmp1, i32 2
336 %tmp4 = sext i16 %tmp3 to i32 335 %tmp4 = sext i16 %tmp3 to i64
337 ret i32 %tmp4 336 ret i64 %tmp4
338 } 337 }
339 338
340 define i64 @smovx4s(<4 x i32> %tmp1) { 339 define i64 @smovx4s(<4 x i32> %tmp1) {
341 ; CHECK-LABEL: smovx4s: 340 ; CHECK-LABEL: smovx4s:
342 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.s[2] 341 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.s[2]
899 %vecext11 = extractelement <16 x i8> %x, i32 6 898 %vecext11 = extractelement <16 x i8> %x, i32 6
900 %vecinit12 = insertelement <8 x i8> %vecinit10, i8 %vecext11, i32 6 899 %vecinit12 = insertelement <8 x i8> %vecinit10, i8 %vecext11, i32 6
901 %vecext13 = extractelement <16 x i8> %x, i32 7 900 %vecext13 = extractelement <16 x i8> %x, i32 7
902 %vecinit14 = insertelement <8 x i8> %vecinit12, i8 %vecext13, i32 7 901 %vecinit14 = insertelement <8 x i8> %vecinit12, i8 %vecext13, i32 7
903 ret <8 x i8> %vecinit14 902 ret <8 x i8> %vecinit14
903 }
904
905 ; CHECK-LABEL: test_extracts_inserts_varidx_extract:
906 ; CHECK: str q0
907 ; CHECK: add x[[PTR:[0-9]+]], {{.*}}, w0, sxtw #1
908 ; CHECK-DAG: ld1 { v[[R:[0-9]+]].h }[0], [x[[PTR]]]
909 ; CHECK-DAG: ins v[[R]].h[1], v0.h[1]
910 ; CHECK-DAG: ins v[[R]].h[2], v0.h[2]
911 ; CHECK-DAG: ins v[[R]].h[3], v0.h[3]
912 define <4 x i16> @test_extracts_inserts_varidx_extract(<8 x i16> %x, i32 %idx) {
913 %tmp = extractelement <8 x i16> %x, i32 %idx
914 %tmp2 = insertelement <4 x i16> undef, i16 %tmp, i32 0
915 %tmp3 = extractelement <8 x i16> %x, i32 1
916 %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 1
917 %tmp5 = extractelement <8 x i16> %x, i32 2
918 %tmp6 = insertelement <4 x i16> %tmp4, i16 %tmp5, i32 2
919 %tmp7 = extractelement <8 x i16> %x, i32 3
920 %tmp8 = insertelement <4 x i16> %tmp6, i16 %tmp7, i32 3
921 ret <4 x i16> %tmp8
922 }
923
924 ; CHECK-LABEL: test_extracts_inserts_varidx_insert:
925 ; CHECK: str h0, [{{.*}}, w0, sxtw #1]
926 ; CHECK-DAG: ldr d[[R:[0-9]+]]
927 ; CHECK-DAG: ins v[[R]].h[1], v0.h[1]
928 ; CHECK-DAG: ins v[[R]].h[2], v0.h[2]
929 ; CHECK-DAG: ins v[[R]].h[3], v0.h[3]
930 define <4 x i16> @test_extracts_inserts_varidx_insert(<8 x i16> %x, i32 %idx) {
931 %tmp = extractelement <8 x i16> %x, i32 0
932 %tmp2 = insertelement <4 x i16> undef, i16 %tmp, i32 %idx
933 %tmp3 = extractelement <8 x i16> %x, i32 1
934 %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 1
935 %tmp5 = extractelement <8 x i16> %x, i32 2
936 %tmp6 = insertelement <4 x i16> %tmp4, i16 %tmp5, i32 2
937 %tmp7 = extractelement <8 x i16> %x, i32 3
938 %tmp8 = insertelement <4 x i16> %tmp6, i16 %tmp7, i32 3
939 ret <4 x i16> %tmp8
904 } 940 }
905 941
906 define <4 x i16> @test_dup_v2i32_v4i16(<2 x i32> %a) { 942 define <4 x i16> @test_dup_v2i32_v4i16(<2 x i32> %a) {
907 ; CHECK-LABEL: test_dup_v2i32_v4i16: 943 ; CHECK-LABEL: test_dup_v2i32_v4i16:
908 ; CHECK: dup v0.4h, v0.h[2] 944 ; CHECK: dup v0.4h, v0.h[2]