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comparison test/CodeGen/AArch64/divrem.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
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96:6418606d0ead 100:7d135dc70f03
1 ; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -mattr=+neon | FileCheck %s
2
3 ; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
4 ; should not generate select error.
5 define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, < 2 x i32>* %z) {
6 ; CHECK-LABEL: test_udivrem
7 ; CHECK-DAG: udivrem
8 ; CHECK-NOT: LLVM ERROR: Cannot select
9 %div = udiv <2 x i32> %x, %y
10 store <2 x i32> %div, <2 x i32>* %z
11 %1 = urem <2 x i32> %x, %y
12 ret <2 x i32> %1
13 }
14
15 define <4 x i32> @test_sdivrem(<4 x i32> %x, <4 x i32>* %y) {
16 ; CHECK-LABEL: test_sdivrem
17 ; CHECK-DAG: sdivrem
18 %div = sdiv <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
19 store <4 x i32> %div, <4 x i32>* %y
20 %1 = srem <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
21 ret <4 x i32> %1
22 }