Mercurial > hg > CbC > CbC_llvm
comparison test/CodeGen/AMDGPU/bitreverse.ll @ 100:7d135dc70f03 LLVM 3.9
LLVM 3.9
author | Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp> |
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date | Tue, 26 Jan 2016 22:53:40 +0900 |
parents | |
children | 1172e4bd9c6f |
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96:6418606d0ead | 100:7d135dc70f03 |
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1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s | |
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s | |
3 | |
4 declare i16 @llvm.bitreverse.i16(i16) #1 | |
5 declare i32 @llvm.bitreverse.i32(i32) #1 | |
6 declare i64 @llvm.bitreverse.i64(i64) #1 | |
7 | |
8 declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>) #1 | |
9 declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) #1 | |
10 | |
11 declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1 | |
12 declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1 | |
13 | |
14 declare i32 @llvm.AMDGPU.brev(i32) #1 | |
15 | |
16 ; FUNC-LABEL: {{^}}s_brev_i16: | |
17 ; SI: s_brev_b32 | |
18 define void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 { | |
19 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1 | |
20 store i16 %brev, i16 addrspace(1)* %out | |
21 ret void | |
22 } | |
23 | |
24 ; FUNC-LABEL: {{^}}v_brev_i16: | |
25 ; SI: v_bfrev_b32_e32 | |
26 define void @v_brev_i16(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) #0 { | |
27 %val = load i16, i16 addrspace(1)* %valptr | |
28 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1 | |
29 store i16 %brev, i16 addrspace(1)* %out | |
30 ret void | |
31 } | |
32 | |
33 ; FUNC-LABEL: {{^}}s_brev_i32: | |
34 ; SI: s_load_dword [[VAL:s[0-9]+]], | |
35 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]] | |
36 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] | |
37 ; SI: buffer_store_dword [[VRESULT]], | |
38 ; SI: s_endpgm | |
39 define void @s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) #0 { | |
40 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1 | |
41 store i32 %brev, i32 addrspace(1)* %out | |
42 ret void | |
43 } | |
44 | |
45 ; FUNC-LABEL: {{^}}v_brev_i32: | |
46 ; SI: buffer_load_dword [[VAL:v[0-9]+]], | |
47 ; SI: v_bfrev_b32_e32 [[RESULT:v[0-9]+]], [[VAL]] | |
48 ; SI: buffer_store_dword [[RESULT]], | |
49 ; SI: s_endpgm | |
50 define void @v_brev_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) #0 { | |
51 %val = load i32, i32 addrspace(1)* %valptr | |
52 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1 | |
53 store i32 %brev, i32 addrspace(1)* %out | |
54 ret void | |
55 } | |
56 | |
57 ; FUNC-LABEL: {{^}}s_brev_v2i32: | |
58 ; SI: s_brev_b32 | |
59 ; SI: s_brev_b32 | |
60 define void @s_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> %val) #0 { | |
61 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1 | |
62 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out | |
63 ret void | |
64 } | |
65 | |
66 ; FUNC-LABEL: {{^}}v_brev_v2i32: | |
67 ; SI: v_bfrev_b32_e32 | |
68 ; SI: v_bfrev_b32_e32 | |
69 define void @v_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) #0 { | |
70 %val = load <2 x i32>, <2 x i32> addrspace(1)* %valptr | |
71 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1 | |
72 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out | |
73 ret void | |
74 } | |
75 | |
76 ; FUNC-LABEL: {{^}}s_brev_i64: | |
77 define void @s_brev_i64(i64 addrspace(1)* noalias %out, i64 %val) #0 { | |
78 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1 | |
79 store i64 %brev, i64 addrspace(1)* %out | |
80 ret void | |
81 } | |
82 | |
83 ; FUNC-LABEL: {{^}}v_brev_i64: | |
84 define void @v_brev_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %valptr) #0 { | |
85 %val = load i64, i64 addrspace(1)* %valptr | |
86 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1 | |
87 store i64 %brev, i64 addrspace(1)* %out | |
88 ret void | |
89 } | |
90 | |
91 ; FUNC-LABEL: {{^}}s_brev_v2i64: | |
92 define void @s_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %val) #0 { | |
93 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1 | |
94 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out | |
95 ret void | |
96 } | |
97 | |
98 ; FUNC-LABEL: {{^}}v_brev_v2i64: | |
99 define void @v_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %valptr) #0 { | |
100 %val = load <2 x i64>, <2 x i64> addrspace(1)* %valptr | |
101 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1 | |
102 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out | |
103 ret void | |
104 } | |
105 | |
106 ; FUNC-LABEL: {{^}}legacy_s_brev_i32: | |
107 ; SI: s_brev_b32 | |
108 define void @legacy_s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind { | |
109 %brev = call i32 @llvm.AMDGPU.brev(i32 %val) #1 | |
110 store i32 %brev, i32 addrspace(1)* %out | |
111 ret void | |
112 } | |
113 | |
114 attributes #0 = { nounwind } | |
115 attributes #1 = { nounwind readnone } |