Mercurial > hg > CbC > CbC_llvm
comparison test/CodeGen/AMDGPU/reorder-stores.ll @ 100:7d135dc70f03 LLVM 3.9
LLVM 3.9
author | Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp> |
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date | Tue, 26 Jan 2016 22:53:40 +0900 |
parents | afa8332a0e37 |
children | 1172e4bd9c6f |
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96:6418606d0ead | 100:7d135dc70f03 |
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1 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s | 1 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s |
2 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s | 2 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s |
3 | 3 |
4 ; SI-LABEL: {{^}}no_reorder_v2f64_global_load_store: | 4 ; SI-LABEL: {{^}}no_reorder_v2f64_global_load_store: |
5 ; SI: buffer_load_dwordx2 | 5 ; SI: buffer_load_dwordx4 |
6 ; SI: buffer_load_dwordx2 | 6 ; SI: buffer_load_dwordx4 |
7 ; SI: buffer_load_dwordx2 | 7 ; SI: buffer_store_dwordx4 |
8 ; SI: buffer_load_dwordx2 | 8 ; SI: buffer_store_dwordx4 |
9 ; SI: buffer_store_dwordx2 | |
10 ; SI: buffer_store_dwordx2 | |
11 ; SI: buffer_store_dwordx2 | |
12 ; SI: buffer_store_dwordx2 | |
13 ; SI: s_endpgm | 9 ; SI: s_endpgm |
14 define void @no_reorder_v2f64_global_load_store(<2 x double> addrspace(1)* nocapture %x, <2 x double> addrspace(1)* nocapture %y) nounwind { | 10 define void @no_reorder_v2f64_global_load_store(<2 x double> addrspace(1)* nocapture %x, <2 x double> addrspace(1)* nocapture %y) nounwind { |
15 %tmp1 = load <2 x double>, <2 x double> addrspace(1)* %x, align 16 | 11 %tmp1 = load <2 x double>, <2 x double> addrspace(1)* %x, align 16 |
16 %tmp4 = load <2 x double>, <2 x double> addrspace(1)* %y, align 16 | 12 %tmp4 = load <2 x double>, <2 x double> addrspace(1)* %y, align 16 |
17 store <2 x double> %tmp4, <2 x double> addrspace(1)* %x, align 16 | 13 store <2 x double> %tmp4, <2 x double> addrspace(1)* %x, align 16 |
32 store <2 x double> %tmp1, <2 x double> addrspace(3)* %y, align 16 | 28 store <2 x double> %tmp1, <2 x double> addrspace(3)* %y, align 16 |
33 ret void | 29 ret void |
34 } | 30 } |
35 | 31 |
36 ; SI-LABEL: {{^}}no_reorder_split_v8i32_global_load_store: | 32 ; SI-LABEL: {{^}}no_reorder_split_v8i32_global_load_store: |
37 ; SI: buffer_load_dword | 33 ; SI: buffer_load_dwordx4 |
38 ; SI: buffer_load_dword | 34 ; SI: buffer_load_dwordx4 |
39 ; SI: buffer_load_dword | 35 ; SI: buffer_load_dwordx4 |
40 ; SI: buffer_load_dword | 36 ; SI: buffer_load_dwordx4 |
41 | |
42 ; SI: buffer_load_dword | |
43 ; SI: buffer_load_dword | |
44 ; SI: buffer_load_dword | |
45 ; SI: buffer_load_dword | |
46 | |
47 ; SI: buffer_load_dword | |
48 ; SI: buffer_load_dword | |
49 ; SI: buffer_load_dword | |
50 ; SI: buffer_load_dword | |
51 | |
52 ; SI: buffer_load_dword | |
53 ; SI: buffer_load_dword | |
54 ; SI: buffer_load_dword | |
55 ; SI: buffer_load_dword | |
56 | 37 |
57 | 38 |
58 ; SI: buffer_store_dword | 39 ; SI: buffer_store_dwordx4 |
59 ; SI: buffer_store_dword | 40 ; SI: buffer_store_dwordx4 |
60 ; SI: buffer_store_dword | 41 ; SI: buffer_store_dwordx4 |
61 ; SI: buffer_store_dword | 42 ; SI: buffer_store_dwordx4 |
62 | |
63 ; SI: buffer_store_dword | |
64 ; SI: buffer_store_dword | |
65 ; SI: buffer_store_dword | |
66 ; SI: buffer_store_dword | |
67 | |
68 ; SI: buffer_store_dword | |
69 ; SI: buffer_store_dword | |
70 ; SI: buffer_store_dword | |
71 ; SI: buffer_store_dword | |
72 | |
73 ; SI: buffer_store_dword | |
74 ; SI: buffer_store_dword | |
75 ; SI: buffer_store_dword | |
76 ; SI: buffer_store_dword | |
77 ; SI: s_endpgm | 43 ; SI: s_endpgm |
78 define void @no_reorder_split_v8i32_global_load_store(<8 x i32> addrspace(1)* nocapture %x, <8 x i32> addrspace(1)* nocapture %y) nounwind { | 44 define void @no_reorder_split_v8i32_global_load_store(<8 x i32> addrspace(1)* nocapture %x, <8 x i32> addrspace(1)* nocapture %y) nounwind { |
79 %tmp1 = load <8 x i32>, <8 x i32> addrspace(1)* %x, align 32 | 45 %tmp1 = load <8 x i32>, <8 x i32> addrspace(1)* %x, align 32 |
80 %tmp4 = load <8 x i32>, <8 x i32> addrspace(1)* %y, align 32 | 46 %tmp4 = load <8 x i32>, <8 x i32> addrspace(1)* %y, align 32 |
81 store <8 x i32> %tmp4, <8 x i32> addrspace(1)* %x, align 32 | 47 store <8 x i32> %tmp4, <8 x i32> addrspace(1)* %x, align 32 |