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comparison test/CodeGen/AMDGPU/setcc.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
96:6418606d0ead 100:7d135dc70f03
373 %cmp = icmp eq <3 x i8> %a, %b 373 %cmp = icmp eq <3 x i8> %a, %b
374 %ext = sext <3 x i1> %cmp to <3 x i8> 374 %ext = sext <3 x i1> %cmp to <3 x i8>
375 store <3 x i8> %ext, <3 x i8> addrspace(1)* %gep.out 375 store <3 x i8> %ext, <3 x i8> addrspace(1)* %gep.out
376 ret void 376 ret void
377 } 377 }
378
379 ; Make sure we don't try to emit i1 setcc ops
380 ; FUNC-LABEL: setcc-i1
381 ; SI: s_and_b32 [[AND:s[0-9]+]], s{{[0-9]+}}, 1
382 ; SI: v_cmp_eq_i32_e64 s[0:1], 0, [[AND]]
383 define void @setcc-i1(i32 %in) {
384 %and = and i32 %in, 1
385 %cmp = icmp eq i32 %and, 0
386 br i1 %cmp, label %endif, label %if
387 if:
388 unreachable
389 endif:
390 ret void
391 }
392
393 ; FUNC-LABEL: setcc-i1-and-xor
394 ; SI-DAG: v_cmp_le_f32_e64 [[A:s\[[0-9]+:[0-9]+\]]], 0, s{{[0-9]+}}
395 ; SI-DAG: v_cmp_ge_f32_e64 [[B:s\[[0-9]+:[0-9]+\]]], 1.0, s{{[0-9]+}}
396 ; SI: s_and_b64 s[2:3], [[A]], [[B]]
397 define void @setcc-i1-and-xor(i32 addrspace(1)* %out, float %cond) #0 {
398 bb0:
399 %tmp5 = fcmp oge float %cond, 0.000000e+00
400 %tmp7 = fcmp ole float %cond, 1.000000e+00
401 %tmp9 = and i1 %tmp5, %tmp7
402 %tmp11 = xor i1 %tmp9, 1
403 br i1 %tmp11, label %bb2, label %bb1
404
405 bb1:
406 store i32 0, i32 addrspace(1)* %out
407 br label %bb2
408
409 bb2:
410 ret void
411 }