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comparison test/MC/Disassembler/ARM/invalid-thumbv7.txt @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 54457678186b
children 3a76565eade5
comparison
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96:6418606d0ead 100:7d135dc70f03
1 # RUN: not llvm-mc -disassemble %s -mcpu cortex-a8 -triple thumbv7 2>&1 | FileCheck %s 1 # RUN: not llvm-mc -disassemble %s -mcpu cortex-a8 -triple thumbv7 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V7
2 # RUN: not llvm-mc -disassemble %s -mcpu cortex-a53 -triple thumbv8 2>&1 | FileCheck %s
2 3
3 # This file is checking Thumbv7 encodings which are globally invalid, usually due 4 # This file is checking Thumbv7 encodings which are globally invalid, usually due
4 # to the constraints of the instructions not being met. For example invalid 5 # to the constraints of the instructions not being met. For example invalid
5 # combinations of registers. 6 # combinations of registers.
6 7
357 #------------------------------------------------------------------------------ 358 #------------------------------------------------------------------------------
358 359
359 # 32-bit Thumb STM instructions cannot have a writeback register which appears 360 # 32-bit Thumb STM instructions cannot have a writeback register which appears
360 # in the list. 361 # in the list.
361 362
362 [0xa1,0xe8,0x07,0x04] 363 [0xa1 0xe8 0x07 0x04]
363 # CHECK: warning: potentially undefined instruction encoding 364 # CHECK: warning: potentially undefined instruction encoding
364 # CHECK-NEXT: [0xa1,0xe8,0x07,0x04] 365 # CHECK-NEXT: [0xa1 0xe8 0x07 0x04]
365 366
366 [0x21,0xe9,0x07,0x04] 367 [0x21 0xe9 0x07 0x04]
367 # CHECK: warning: potentially undefined instruction encoding 368 # CHECK: warning: potentially undefined instruction encoding
368 # CHECK-NEXT: [0x21,0xe9,0x07,0x04] 369 # CHECK-NEXT: [0x21 0xe9 0x07 0x04]
370
371 #------------------------------------------------------------------------------
372 # SP is invalid as rGPR before ARMv8
373 #------------------------------------------------------------------------------
374
375 [0x00 0xf0 0x00 0x0d]
376 # CHECK-V7: warning: potentially undefined instruction encoding
377 # CHECK-V7-NEXT: [0x00 0xf0 0x00 0x0d]
378
379 [0x63 0xeb 0x2d 0x46]
380 # CHECK-V7: warning: potentially undefined instruction encoding
381 # CHECK-V7-NEXT: [0x63 0xeb 0x2d 0x46]