comparison lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @ 121:803732b1fca8

LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children 3a76565eade5
comparison
equal deleted inserted replaced
120:1172e4bd9c6f 121:803732b1fca8
1 //===-- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() -----------===// 1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // The LLVM Compiler Infrastructure
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
9 // 9 //
10 // This implements the SelectionDAG::dump method and friends. 10 // This implements the SelectionDAG::dump method and friends.
11 // 11 //
12 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===//
13 13
14 #include "llvm/ADT/APFloat.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/None.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/StringExtras.h"
19 #include "llvm/CodeGen/ISDOpcodes.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineMemOperand.h"
23 #include "llvm/CodeGen/MachineValueType.h"
14 #include "llvm/CodeGen/SelectionDAG.h" 24 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "ScheduleDAGSDNodes.h" 25 #include "llvm/CodeGen/SelectionDAGNodes.h"
16 #include "llvm/ADT/StringExtras.h" 26 #include "llvm/CodeGen/ValueTypes.h"
17 #include "llvm/CodeGen/MachineConstantPool.h" 27 #include "llvm/IR/BasicBlock.h"
18 #include "llvm/CodeGen/MachineFunction.h" 28 #include "llvm/IR/Constants.h"
19 #include "llvm/CodeGen/MachineModuleInfo.h" 29 #include "llvm/IR/DebugInfoMetadata.h"
20 #include "llvm/IR/DebugInfo.h" 30 #include "llvm/IR/DebugLoc.h"
21 #include "llvm/IR/Function.h" 31 #include "llvm/IR/Function.h"
22 #include "llvm/IR/Intrinsics.h" 32 #include "llvm/IR/Intrinsics.h"
33 #include "llvm/IR/Value.h"
34 #include "llvm/Support/Casting.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Compiler.h"
23 #include "llvm/Support/Debug.h" 37 #include "llvm/Support/Debug.h"
24 #include "llvm/Support/GraphWriter.h" 38 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/Printable.h" 39 #include "llvm/Support/Printable.h"
26 #include "llvm/Support/raw_ostream.h" 40 #include "llvm/Support/raw_ostream.h"
27 #include "llvm/Target/TargetInstrInfo.h" 41 #include "llvm/Target/TargetInstrInfo.h"
28 #include "llvm/Target/TargetIntrinsicInfo.h" 42 #include "llvm/Target/TargetIntrinsicInfo.h"
43 #include "llvm/Target/TargetLowering.h"
29 #include "llvm/Target/TargetMachine.h" 44 #include "llvm/Target/TargetMachine.h"
30 #include "llvm/Target/TargetRegisterInfo.h" 45 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetSubtargetInfo.h" 46 #include "llvm/Target/TargetSubtargetInfo.h"
47 #include <cstdint>
48 #include <iterator>
49
32 using namespace llvm; 50 using namespace llvm;
33 51
34 static cl::opt<bool> 52 static cl::opt<bool>
35 VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 53 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
36 cl::desc("Display more information when dumping selection " 54 cl::desc("Display more information when dumping selection "
212 case ISD::UMAX: return "umax"; 230 case ISD::UMAX: return "umax";
213 231
214 case ISD::FPOWI: return "fpowi"; 232 case ISD::FPOWI: return "fpowi";
215 case ISD::SETCC: return "setcc"; 233 case ISD::SETCC: return "setcc";
216 case ISD::SETCCE: return "setcce"; 234 case ISD::SETCCE: return "setcce";
235 case ISD::SETCCCARRY: return "setcccarry";
217 case ISD::SELECT: return "select"; 236 case ISD::SELECT: return "select";
218 case ISD::VSELECT: return "vselect"; 237 case ISD::VSELECT: return "vselect";
219 case ISD::SELECT_CC: return "select_cc"; 238 case ISD::SELECT_CC: return "select_cc";
220 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 239 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
221 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 240 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
225 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 244 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
226 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 245 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
227 case ISD::CARRY_FALSE: return "carry_false"; 246 case ISD::CARRY_FALSE: return "carry_false";
228 case ISD::ADDC: return "addc"; 247 case ISD::ADDC: return "addc";
229 case ISD::ADDE: return "adde"; 248 case ISD::ADDE: return "adde";
249 case ISD::ADDCARRY: return "addcarry";
230 case ISD::SADDO: return "saddo"; 250 case ISD::SADDO: return "saddo";
231 case ISD::UADDO: return "uaddo"; 251 case ISD::UADDO: return "uaddo";
232 case ISD::SSUBO: return "ssubo"; 252 case ISD::SSUBO: return "ssubo";
233 case ISD::USUBO: return "usubo"; 253 case ISD::USUBO: return "usubo";
234 case ISD::SMULO: return "smulo"; 254 case ISD::SMULO: return "smulo";
235 case ISD::UMULO: return "umulo"; 255 case ISD::UMULO: return "umulo";
236 case ISD::SUBC: return "subc"; 256 case ISD::SUBC: return "subc";
237 case ISD::SUBE: return "sube"; 257 case ISD::SUBE: return "sube";
258 case ISD::SUBCARRY: return "subcarry";
238 case ISD::SHL_PARTS: return "shl_parts"; 259 case ISD::SHL_PARTS: return "shl_parts";
239 case ISD::SRA_PARTS: return "sra_parts"; 260 case ISD::SRA_PARTS: return "sra_parts";
240 case ISD::SRL_PARTS: return "srl_parts"; 261 case ISD::SRL_PARTS: return "srl_parts";
241 262
242 // Conversion operators. 263 // Conversion operators.
259 case ISD::FP_TO_UINT: return "fp_to_uint"; 280 case ISD::FP_TO_UINT: return "fp_to_uint";
260 case ISD::BITCAST: return "bitcast"; 281 case ISD::BITCAST: return "bitcast";
261 case ISD::ADDRSPACECAST: return "addrspacecast"; 282 case ISD::ADDRSPACECAST: return "addrspacecast";
262 case ISD::FP16_TO_FP: return "fp16_to_fp"; 283 case ISD::FP16_TO_FP: return "fp16_to_fp";
263 case ISD::FP_TO_FP16: return "fp_to_fp16"; 284 case ISD::FP_TO_FP16: return "fp_to_fp16";
264
265 case ISD::CONVERT_RNDSAT: {
266 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
267 default: llvm_unreachable("Unknown cvt code!");
268 case ISD::CVT_FF: return "cvt_ff";
269 case ISD::CVT_FS: return "cvt_fs";
270 case ISD::CVT_FU: return "cvt_fu";
271 case ISD::CVT_SF: return "cvt_sf";
272 case ISD::CVT_UF: return "cvt_uf";
273 case ISD::CVT_SS: return "cvt_ss";
274 case ISD::CVT_SU: return "cvt_su";
275 case ISD::CVT_US: return "cvt_us";
276 case ISD::CVT_UU: return "cvt_uu";
277 }
278 }
279 285
280 // Control flow instructions 286 // Control flow instructions
281 case ISD::BR: return "br"; 287 case ISD::BR: return "br";
282 case ISD::BRIND: return "brind"; 288 case ISD::BRIND: return "brind";
283 case ISD::BR_JT: return "br_jt"; 289 case ISD::BR_JT: return "br_jt";
313 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 319 case ISD::GC_TRANSITION_START: return "gc_transition.start";
314 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 320 case ISD::GC_TRANSITION_END: return "gc_transition.end";
315 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 321 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
316 322
317 // Bit manipulation 323 // Bit manipulation
324 case ISD::ABS: return "abs";
318 case ISD::BITREVERSE: return "bitreverse"; 325 case ISD::BITREVERSE: return "bitreverse";
319 case ISD::BSWAP: return "bswap"; 326 case ISD::BSWAP: return "bswap";
320 case ISD::CTPOP: return "ctpop"; 327 case ISD::CTPOP: return "ctpop";
321 case ISD::CTTZ: return "cttz"; 328 case ISD::CTTZ: return "cttz";
322 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 329 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
323 case ISD::CTLZ: return "ctlz"; 330 case ISD::CTLZ: return "ctlz";
324 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 331 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
325 332
326 // Trampolines 333 // Trampolines
327 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 334 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
328 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 335 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
329 336
330 case ISD::CONDCODE: 337 case ISD::CONDCODE:
356 case ISD::SETTRUE: return "settrue"; 363 case ISD::SETTRUE: return "settrue";
357 case ISD::SETTRUE2: return "settrue2"; 364 case ISD::SETTRUE2: return "settrue2";
358 case ISD::SETFALSE: return "setfalse"; 365 case ISD::SETFALSE: return "setfalse";
359 case ISD::SETFALSE2: return "setfalse2"; 366 case ISD::SETFALSE2: return "setfalse2";
360 } 367 }
368 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
369 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
370 case ISD::VECREDUCE_ADD: return "vecreduce_add";
371 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
372 case ISD::VECREDUCE_AND: return "vecreduce_and";
373 case ISD::VECREDUCE_OR: return "vecreduce_or";
374 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
375 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
376 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
377 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
378 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
379 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
380 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
361 } 381 }
362 } 382 }
363 383
364 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 384 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
365 switch (AM) { 385 switch (AM) {
379 OS << (const void*)&Node; 399 OS << (const void*)&Node;
380 #endif 400 #endif
381 }); 401 });
382 } 402 }
383 403
404 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
384 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 405 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
385 void SDNode::dump(const SelectionDAG *G) const { 406
407 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
386 print(dbgs(), G); 408 print(dbgs(), G);
387 dbgs() << '\n'; 409 dbgs() << '\n';
388 } 410 }
411 #endif
389 412
390 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 413 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
391 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 414 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
392 if (i) OS << ","; 415 if (i) OS << ",";
393 if (getValueType(i) == MVT::Other) 416 if (getValueType(i) == MVT::Other)
396 OS << getValueType(i).getEVTString(); 419 OS << getValueType(i).getEVTString();
397 } 420 }
398 } 421 }
399 422
400 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 423 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
424 if (getFlags().hasNoUnsignedWrap())
425 OS << " nuw";
426
427 if (getFlags().hasNoSignedWrap())
428 OS << " nsw";
429
430 if (getFlags().hasExact())
431 OS << " exact";
432
433 if (getFlags().hasUnsafeAlgebra())
434 OS << " unsafe";
435
436 if (getFlags().hasNoNaNs())
437 OS << " nnan";
438
439 if (getFlags().hasNoInfs())
440 OS << " ninf";
441
442 if (getFlags().hasNoSignedZeros())
443 OS << " nsz";
444
445 if (getFlags().hasAllowReciprocal())
446 OS << " arcp";
447
448 if (getFlags().hasAllowContract())
449 OS << " contract";
450
451 if (getFlags().hasVectorReduction())
452 OS << " vector-reduction";
453
401 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 454 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
402 if (!MN->memoperands_empty()) { 455 if (!MN->memoperands_empty()) {
403 OS << "<"; 456 OS << "<";
404 OS << "Mem:"; 457 OS << "Mem:";
405 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 458 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
423 } 476 }
424 OS << ">"; 477 OS << ">";
425 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 478 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
426 OS << '<' << CSDN->getAPIntValue() << '>'; 479 OS << '<' << CSDN->getAPIntValue() << '>';
427 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 480 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
428 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 481 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
429 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 482 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
430 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 483 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
431 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 484 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
432 else { 485 else {
433 OS << "<APFloat("; 486 OS << "<APFloat(";
434 CSDN->getValueAPF().bitcastToAPInt().dump(); 487 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
435 OS << ")>"; 488 OS << ")>";
436 } 489 }
437 } else if (const GlobalAddressSDNode *GADN = 490 } else if (const GlobalAddressSDNode *GADN =
438 dyn_cast<GlobalAddressSDNode>(this)) { 491 dyn_cast<GlobalAddressSDNode>(this)) {
439 int64_t offset = GADN->getOffset(); 492 int64_t offset = GADN->getOffset();
579 if (Node.getOpcode() == ISD::EntryToken) 632 if (Node.getOpcode() == ISD::EntryToken)
580 return false; 633 return false;
581 return Node.getNumOperands() == 0; 634 return Node.getNumOperands() == 0;
582 } 635 }
583 636
637 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
584 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 638 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
585 for (const SDValue &Op : N->op_values()) { 639 for (const SDValue &Op : N->op_values()) {
586 if (shouldPrintInline(*Op.getNode())) 640 if (shouldPrintInline(*Op.getNode()))
587 continue; 641 continue;
588 if (Op.getNode()->hasOneUse()) 642 if (Op.getNode()->hasOneUse())
605 } 659 }
606 660
607 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 661 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
608 dbgs() << "\n\n"; 662 dbgs() << "\n\n";
609 } 663 }
664 #endif
610 665
611 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 666 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
612 OS << PrintNodeId(*this) << ": "; 667 OS << PrintNodeId(*this) << ": ";
613 print_types(OS, G); 668 print_types(OS, G);
614 OS << " = " << getOperationName(G); 669 OS << " = " << getOperationName(G);
631 OS << ':' << RN; 686 OS << ':' << RN;
632 return false; 687 return false;
633 } 688 }
634 } 689 }
635 690
636 typedef SmallPtrSet<const SDNode *, 32> VisitedSDNodeSet; 691 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
692 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
693
637 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 694 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
638 const SelectionDAG *G, VisitedSDNodeSet &once) { 695 const SelectionDAG *G, VisitedSDNodeSet &once) {
639 if (!once.insert(N).second) // If we've been here before, return now. 696 if (!once.insert(N).second) // If we've been here before, return now.
640 return; 697 return;
641 698
659 // Dump children that have grandchildren on their own line(s). 716 // Dump children that have grandchildren on their own line(s).
660 for (const SDValue &Op : N->op_values()) 717 for (const SDValue &Op : N->op_values())
661 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 718 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
662 } 719 }
663 720
664 void SDNode::dumpr() const { 721 LLVM_DUMP_METHOD void SDNode::dumpr() const {
665 VisitedSDNodeSet once; 722 VisitedSDNodeSet once;
666 DumpNodesr(dbgs(), this, 0, nullptr, once); 723 DumpNodesr(dbgs(), this, 0, nullptr, once);
667 } 724 }
668 725
669 void SDNode::dumpr(const SelectionDAG *G) const { 726 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
670 VisitedSDNodeSet once; 727 VisitedSDNodeSet once;
671 DumpNodesr(dbgs(), this, 0, G, once); 728 DumpNodesr(dbgs(), this, 0, G, once);
672 } 729 }
730 #endif
673 731
674 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 732 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
675 const SelectionDAG *G, unsigned depth, 733 const SelectionDAG *G, unsigned depth,
676 unsigned indent) { 734 unsigned indent) {
677 if (depth == 0) 735 if (depth == 0)
701 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 759 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
702 // Don't print impossibly deep things. 760 // Don't print impossibly deep things.
703 printrWithDepth(OS, G, 10); 761 printrWithDepth(OS, G, 10);
704 } 762 }
705 763
764 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
765 LLVM_DUMP_METHOD
706 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 766 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
707 printrWithDepth(dbgs(), G, depth); 767 printrWithDepth(dbgs(), G, depth);
708 } 768 }
709 769
710 void SDNode::dumprFull(const SelectionDAG *G) const { 770 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
711 // Don't print impossibly deep things. 771 // Don't print impossibly deep things.
712 dumprWithDepth(G, 10); 772 dumprWithDepth(G, 10);
713 } 773 }
774 #endif
714 775
715 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 776 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
716 printr(OS, G); 777 printr(OS, G);
717 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 778 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
718 if (i) OS << ", "; else OS << " "; 779 if (i) OS << ", "; else OS << " ";