comparison lib/Target/Mips/MicroMipsInstrInfo.td @ 121:803732b1fca8

LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children 3a76565eade5
comparison
equal deleted inserted replaced
120:1172e4bd9c6f 121:803732b1fca8
882 SEB_FM_MM<0x1ec>, ISA_MIPS32R2; 882 SEB_FM_MM<0x1ec>, ISA_MIPS32R2;
883 // TODO: Add '0 < pos+size <= 32' constraint check to ext instruction 883 // TODO: Add '0 < pos+size <= 32' constraint check to ext instruction
884 def EXT_MM : MMRel, ExtBase<"ext", GPR32Opnd, uimm5, uimm5_plus1, immZExt5, 884 def EXT_MM : MMRel, ExtBase<"ext", GPR32Opnd, uimm5, uimm5_plus1, immZExt5,
885 immZExt5Plus1, MipsExt>, EXT_FM_MM<0x2c>; 885 immZExt5Plus1, MipsExt>, EXT_FM_MM<0x2c>;
886 def INS_MM : MMRel, InsBase<"ins", GPR32Opnd, uimm5, uimm5_inssize_plus1, 886 def INS_MM : MMRel, InsBase<"ins", GPR32Opnd, uimm5, uimm5_inssize_plus1,
887 MipsIns>, EXT_FM_MM<0x0c>; 887 immZExt5, immZExt5Plus1, MipsIns>,
888 EXT_FM_MM<0x0c>;
888 889
889 /// Jump Instructions 890 /// Jump Instructions
890 let DecoderMethod = "DecodeJumpTargetMM" in { 891 let DecoderMethod = "DecodeJumpTargetMM" in {
891 def J_MM : MMRel, JumpFJ<jmptarget_mm, "j", br, bb, "j">, 892 def J_MM : MMRel, JumpFJ<jmptarget_mm, "j", br, bb, "j">,
892 J_FM_MM<0x35>; 893 J_FM_MM<0x35>;
1003 1004
1004 //===----------------------------------------------------------------------===// 1005 //===----------------------------------------------------------------------===//
1005 // MicroMips arbitrary patterns that map to one or more instructions 1006 // MicroMips arbitrary patterns that map to one or more instructions
1006 //===----------------------------------------------------------------------===// 1007 //===----------------------------------------------------------------------===//
1007 1008
1008 def : MipsPat<(i32 immLi16:$imm), 1009 let AdditionalPredicates = [InMicroMips] in {
1009 (LI16_MM immLi16:$imm)>;
1010
1011 let AdditionalPredicates = [InMicroMips] in
1012 defm : MaterializeImms<i32, ZERO, ADDiu_MM, LUi_MM, ORi_MM>;
1013
1014 let Predicates = [InMicroMips] in {
1015 def : MipsPat<(i32 immLi16:$imm), 1010 def : MipsPat<(i32 immLi16:$imm),
1016 (LI16_MM immLi16:$imm)>; 1011 (LI16_MM immLi16:$imm)>;
1017 def : MipsPat<(i32 immSExt16:$imm), 1012
1018 (ADDiu_MM ZERO, immSExt16:$imm)>; 1013 defm : MaterializeImms<i32, ZERO, ADDiu_MM, LUi_MM, ORi_MM>;
1019 def : MipsPat<(i32 immZExt16:$imm), 1014 }
1020 (ORi_MM ZERO, immZExt16:$imm)>; 1015
1021 1016 let Predicates = [InMicroMips] in {
1022 def : MipsPat<(not GPRMM16:$in), 1017 def : MipsPat<(not GPRMM16:$in),
1023 (NOT16_MM GPRMM16:$in)>; 1018 (NOT16_MM GPRMM16:$in)>;
1024 def : MipsPat<(not GPR32:$in), 1019 def : MipsPat<(not GPR32:$in),
1025 (NOR_MM GPR32Opnd:$in, ZERO)>; 1020 (NOR_MM GPR32Opnd:$in, ZERO)>;
1026 1021
1134 "sgtu $rd, $rs, $rt", 1129 "sgtu $rd, $rs, $rt",
1135 (SLTu_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; 1130 (SLTu_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
1136 def : MipsInstAlias< 1131 def : MipsInstAlias<
1137 "sgtu $rs, $rt", 1132 "sgtu $rs, $rt",
1138 (SLTu_MM GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; 1133 (SLTu_MM GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
1139 def : MipsInstAlias<"slt $rs, $rt, $imm",
1140 (SLTi_MM GPR32Opnd:$rs, GPR32Opnd:$rt,
1141 simm32_relaxed:$imm), 0>;
1142 def : MipsInstAlias<"sltu $rs, $rt, $imm",
1143 (SLTiu_MM GPR32Opnd:$rs, GPR32Opnd:$rt,
1144 simm32_relaxed:$imm), 0>;
1145 def : MipsInstAlias<"sll $rd, $rt, $rs", 1134 def : MipsInstAlias<"sll $rd, $rt, $rs",
1146 (SLLV_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; 1135 (SLLV_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
1147 def : MipsInstAlias<"sra $rd, $rt, $rs", 1136 def : MipsInstAlias<"sra $rd, $rt, $rs",
1148 (SRAV_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; 1137 (SRAV_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
1149 def : MipsInstAlias<"srl $rd, $rt, $rs", 1138 def : MipsInstAlias<"srl $rd, $rt, $rs",
1161 def : MipsInstAlias<"srl $rd, $shamt", 1150 def : MipsInstAlias<"srl $rd, $shamt",
1162 (SRL_MM GPR32Opnd:$rd, GPR32Opnd:$rd, uimm5:$shamt), 0>; 1151 (SRL_MM GPR32Opnd:$rd, GPR32Opnd:$rd, uimm5:$shamt), 0>;
1163 def : MipsInstAlias<"rotr $rt, $imm", 1152 def : MipsInstAlias<"rotr $rt, $imm",
1164 (ROTR_MM GPR32Opnd:$rt, GPR32Opnd:$rt, uimm5:$imm), 0>; 1153 (ROTR_MM GPR32Opnd:$rt, GPR32Opnd:$rt, uimm5:$imm), 0>;
1165 def : MipsInstAlias<"syscall", (SYSCALL_MM 0), 1>; 1154 def : MipsInstAlias<"syscall", (SYSCALL_MM 0), 1>;
1166 def : MipsInstAlias<"and $rs, $rt, $imm", 1155
1167 (ANDi_MM GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm), 0>; 1156 defm : OneOrTwoOperandMacroImmediateAlias<"add", ADDi_MM>;
1168 def : MipsInstAlias<"and $rs, $imm", 1157
1169 (ANDi_MM GPR32Opnd:$rs, GPR32Opnd:$rs, simm16:$imm), 0>; 1158 defm : OneOrTwoOperandMacroImmediateAlias<"addu", ADDiu_MM>;
1170 def : MipsInstAlias<"or $rs, $rt, $imm", 1159
1171 (ORi_MM GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>; 1160 defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi_MM>;
1172 def : MipsInstAlias<"or $rs, $imm", 1161
1173 (ORi_MM GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>; 1162 defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi_MM>;
1174 def : MipsInstAlias<"xor $rs, $rt, $imm", 1163
1175 (XORi_MM GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>; 1164 defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi_MM>;
1176 def : MipsInstAlias<"xor $rs, $imm", 1165
1177 (XORi_MM GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>; 1166 defm : OneOrTwoOperandMacroImmediateAlias<"slt", SLTi_MM>;
1167
1168 defm : OneOrTwoOperandMacroImmediateAlias<"sltu", SLTiu_MM>;
1169
1178 def : MipsInstAlias<"not $rt, $rs", 1170 def : MipsInstAlias<"not $rt, $rs",
1179 (NOR_MM GPR32Opnd:$rt, GPR32Opnd:$rs, ZERO), 0>; 1171 (NOR_MM GPR32Opnd:$rt, GPR32Opnd:$rs, ZERO), 0>;
1180 def : MipsInstAlias<"not $rt", 1172 def : MipsInstAlias<"not $rt",
1181 (NOR_MM GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>; 1173 (NOR_MM GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>;
1182 def : MipsInstAlias<"bnez $rs,$offset", 1174 def : MipsInstAlias<"bnez $rs,$offset",