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comparison test/CodeGen/AMDGPU/bitreverse.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children 3a76565eade5
comparison
equal deleted inserted replaced
120:1172e4bd9c6f 121:803732b1fca8
1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3 ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s 3 ; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s
4
5 declare i32 @llvm.amdgcn.workitem.id.x() #1
4 6
5 declare i16 @llvm.bitreverse.i16(i16) #1 7 declare i16 @llvm.bitreverse.i16(i16) #1
6 declare i32 @llvm.bitreverse.i32(i32) #1 8 declare i32 @llvm.bitreverse.i32(i32) #1
7 declare i64 @llvm.bitreverse.i64(i64) #1 9 declare i64 @llvm.bitreverse.i64(i64) #1
8 10
12 declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1 14 declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1
13 declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1 15 declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1
14 16
15 ; FUNC-LABEL: {{^}}s_brev_i16: 17 ; FUNC-LABEL: {{^}}s_brev_i16:
16 ; SI: s_brev_b32 18 ; SI: s_brev_b32
17 define void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 { 19 define amdgpu_kernel void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 {
18 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1 20 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
19 store i16 %brev, i16 addrspace(1)* %out 21 store i16 %brev, i16 addrspace(1)* %out
20 ret void 22 ret void
21 } 23 }
22 24
23 ; FUNC-LABEL: {{^}}v_brev_i16: 25 ; FUNC-LABEL: {{^}}v_brev_i16:
24 ; SI: v_bfrev_b32_e32 26 ; SI: v_bfrev_b32_e32
25 define void @v_brev_i16(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) #0 { 27 define amdgpu_kernel void @v_brev_i16(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) #0 {
26 %val = load i16, i16 addrspace(1)* %valptr 28 %val = load i16, i16 addrspace(1)* %valptr
27 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1 29 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
28 store i16 %brev, i16 addrspace(1)* %out 30 store i16 %brev, i16 addrspace(1)* %out
29 ret void 31 ret void
30 } 32 }
33 ; SI: s_load_dword [[VAL:s[0-9]+]], 35 ; SI: s_load_dword [[VAL:s[0-9]+]],
34 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]] 36 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]]
35 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] 37 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
36 ; SI: buffer_store_dword [[VRESULT]], 38 ; SI: buffer_store_dword [[VRESULT]],
37 ; SI: s_endpgm 39 ; SI: s_endpgm
38 define void @s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) #0 { 40 define amdgpu_kernel void @s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) #0 {
39 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1 41 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1
40 store i32 %brev, i32 addrspace(1)* %out 42 store i32 %brev, i32 addrspace(1)* %out
41 ret void 43 ret void
42 } 44 }
43 45
44 ; FUNC-LABEL: {{^}}v_brev_i32: 46 ; FUNC-LABEL: {{^}}v_brev_i32:
45 ; SI: buffer_load_dword [[VAL:v[0-9]+]], 47 ; SI: {{buffer|flat}}_load_dword [[VAL:v[0-9]+]],
46 ; SI: v_bfrev_b32_e32 [[RESULT:v[0-9]+]], [[VAL]] 48 ; SI: v_bfrev_b32_e32 [[RESULT:v[0-9]+]], [[VAL]]
47 ; SI: buffer_store_dword [[RESULT]], 49 ; SI: buffer_store_dword [[RESULT]],
48 ; SI: s_endpgm 50 ; SI: s_endpgm
49 define void @v_brev_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) #0 { 51 define amdgpu_kernel void @v_brev_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) #0 {
50 %val = load i32, i32 addrspace(1)* %valptr 52 %tid = call i32 @llvm.amdgcn.workitem.id.x()
53 %gep = getelementptr i32, i32 addrspace(1)* %valptr, i32 %tid
54 %val = load i32, i32 addrspace(1)* %gep
51 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1 55 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1
52 store i32 %brev, i32 addrspace(1)* %out 56 store i32 %brev, i32 addrspace(1)* %out
53 ret void 57 ret void
54 } 58 }
55 59
56 ; FUNC-LABEL: {{^}}s_brev_v2i32: 60 ; FUNC-LABEL: {{^}}s_brev_v2i32:
57 ; SI: s_brev_b32 61 ; SI: s_brev_b32
58 ; SI: s_brev_b32 62 ; SI: s_brev_b32
59 define void @s_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> %val) #0 { 63 define amdgpu_kernel void @s_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> %val) #0 {
60 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1 64 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1
61 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out 65 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out
62 ret void 66 ret void
63 } 67 }
64 68
65 ; FUNC-LABEL: {{^}}v_brev_v2i32: 69 ; FUNC-LABEL: {{^}}v_brev_v2i32:
66 ; SI: v_bfrev_b32_e32 70 ; SI: v_bfrev_b32_e32
67 ; SI: v_bfrev_b32_e32 71 ; SI: v_bfrev_b32_e32
68 define void @v_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) #0 { 72 define amdgpu_kernel void @v_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) #0 {
69 %val = load <2 x i32>, <2 x i32> addrspace(1)* %valptr 73 %tid = call i32 @llvm.amdgcn.workitem.id.x()
74 %gep = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %valptr, i32 %tid
75 %val = load <2 x i32>, <2 x i32> addrspace(1)* %gep
70 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1 76 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1
71 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out 77 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out
72 ret void 78 ret void
73 } 79 }
74 80
75 ; FUNC-LABEL: {{^}}s_brev_i64: 81 ; FUNC-LABEL: {{^}}s_brev_i64:
76 define void @s_brev_i64(i64 addrspace(1)* noalias %out, i64 %val) #0 { 82 define amdgpu_kernel void @s_brev_i64(i64 addrspace(1)* noalias %out, i64 %val) #0 {
77 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1 83 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1
78 store i64 %brev, i64 addrspace(1)* %out 84 store i64 %brev, i64 addrspace(1)* %out
79 ret void 85 ret void
80 } 86 }
81 87
82 ; FUNC-LABEL: {{^}}v_brev_i64: 88 ; FUNC-LABEL: {{^}}v_brev_i64:
83 ; SI-NOT: v_or_b32_e64 v{{[0-9]+}}, 0, 0 89 ; SI-NOT: v_or_b32_e64 v{{[0-9]+}}, 0, 0
84 define void @v_brev_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %valptr) #0 { 90 define amdgpu_kernel void @v_brev_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %valptr) #0 {
85 %val = load i64, i64 addrspace(1)* %valptr 91 %tid = call i32 @llvm.amdgcn.workitem.id.x()
92 %gep = getelementptr i64, i64 addrspace(1)* %valptr, i32 %tid
93 %val = load i64, i64 addrspace(1)* %gep
86 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1 94 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1
87 store i64 %brev, i64 addrspace(1)* %out 95 store i64 %brev, i64 addrspace(1)* %out
88 ret void 96 ret void
89 } 97 }
90 98
91 ; FUNC-LABEL: {{^}}s_brev_v2i64: 99 ; FUNC-LABEL: {{^}}s_brev_v2i64:
92 define void @s_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %val) #0 { 100 define amdgpu_kernel void @s_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %val) #0 {
93 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1 101 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1
94 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out 102 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out
95 ret void 103 ret void
96 } 104 }
97 105
98 ; FUNC-LABEL: {{^}}v_brev_v2i64: 106 ; FUNC-LABEL: {{^}}v_brev_v2i64:
99 define void @v_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %valptr) #0 { 107 define amdgpu_kernel void @v_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %valptr) #0 {
100 %val = load <2 x i64>, <2 x i64> addrspace(1)* %valptr 108 %tid = call i32 @llvm.amdgcn.workitem.id.x()
109 %gep = getelementptr <2 x i64> , <2 x i64> addrspace(1)* %valptr, i32 %tid
110 %val = load <2 x i64>, <2 x i64> addrspace(1)* %gep
101 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1 111 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1
102 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out 112 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out
103 ret void 113 ret void
104 } 114 }
105 115