Mercurial > hg > CbC > CbC_llvm

comparison test/CodeGen/Hexagon/early-if-merge-loop.ll @ 121:803732b1fca8

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents
children c2174574ed3a
comparison
equal deleted inserted replaced
120:1172e4bd9c6f 121:803732b1fca8
1 ; RUN: llc -march=hexagon < %s | FileCheck %s
2 ; Make sure that the loop in the end has only one basic block.
3
4 ; CHECK-LABEL: fred
5 ; Rely on the comments, make sure the one for the loop header is present.
6 ; CHECK: %loop
7 ; CHECK-NOT: %should_merge
8
9 target triple = "hexagon"
10
11 define i32 @fred(i32 %a0, i64* nocapture readonly %a1) #0 {
12 b2:
13 %v3 = bitcast i64* %a1 to i32*
14 %v4 = getelementptr inbounds i32, i32* %v3, i32 1
15 %v5 = zext i32 %a0 to i64
16 br label %loop
17
18 loop: ; preds = %should_merge, %b2
19 %v7 = phi i32 [ 0, %b2 ], [ %v49, %should_merge ]
20 %v8 = phi i32 [ 0, %b2 ], [ %v42, %should_merge ]
21 %v9 = phi i32* [ %v4, %b2 ], [ %v53, %should_merge ]
22 %v10 = phi i32 [ 0, %b2 ], [ %v30, %should_merge ]
23 %v11 = phi i32* [ %v3, %b2 ], [ %v51, %should_merge ]
24 %v12 = phi i32 [ 0, %b2 ], [ %v23, %should_merge ]
25 %v13 = phi i32 [ 2, %b2 ], [ %v54, %should_merge ]
26 %v14 = load i32, i32* %v11, align 4, !tbaa !0
27 %v15 = load i32, i32* %v9, align 4, !tbaa !0
28 %v16 = icmp ult i32 %v13, 30
29 %v17 = zext i32 %v12 to i64
30 %v18 = shl nuw i64 %v17, 32
31 %v19 = zext i32 %v14 to i64
32 %v20 = or i64 %v18, %v19
33 %v21 = tail call i64 @llvm.hexagon.A2.addp(i64 %v20, i64 %v5)
34 %v22 = lshr i64 %v21, 32
35 %v23 = trunc i64 %v22 to i32
36 %v24 = zext i32 %v10 to i64
37 %v25 = shl nuw i64 %v24, 32
38 %v26 = zext i32 %v15 to i64
39 %v27 = or i64 %v25, %v26
40 %v28 = tail call i64 @llvm.hexagon.A2.addp(i64 %v27, i64 %v5)
41 %v29 = lshr i64 %v28, 32
42 %v30 = trunc i64 %v29 to i32
43 %v31 = getelementptr inbounds i32, i32* %v3, i32 %v13
44 %v32 = load i32, i32* %v31, align 4, !tbaa !0
45 %v33 = or i32 %v13, 1
46 %v34 = getelementptr inbounds i32, i32* %v3, i32 %v33
47 %v35 = load i32, i32* %v34, align 4, !tbaa !0
48 %v36 = zext i32 %v8 to i64
49 %v37 = shl nuw i64 %v36, 32
50 %v38 = zext i32 %v32 to i64
51 %v39 = or i64 %v37, %v38
52 %v40 = tail call i64 @llvm.hexagon.A2.subp(i64 %v39, i64 %v5)
53 %v41 = lshr i64 %v40, 32
54 %v42 = trunc i64 %v41 to i32
55 %v43 = zext i32 %v7 to i64
56 %v44 = shl nuw i64 %v43, 32
57 %v45 = zext i32 %v35 to i64
58 %v46 = or i64 %v44, %v45
59 %v47 = tail call i64 @llvm.hexagon.A2.subp(i64 %v46, i64 %v5)
60 %v48 = lshr i64 %v47, 32
61 %v49 = trunc i64 %v48 to i32
62 br i1 %v16, label %should_merge, label %exit
63
64 should_merge: ; preds = %loop
65 %v50 = add nuw nsw i32 %v13, 2
66 %v51 = getelementptr inbounds i32, i32* %v3, i32 %v50
67 %v52 = add nuw nsw i32 %v13, 3
68 %v53 = getelementptr inbounds i32, i32* %v3, i32 %v52
69 %v54 = add nuw nsw i32 %v13, 4
70 br label %loop
71
72 exit: ; preds = %loop
73 %v57 = tail call i64 @llvm.hexagon.A2.combinew(i32 %v42, i32 %v23)
74 %v58 = tail call i64 @llvm.hexagon.A2.combinew(i32 %v49, i32 %v30)
75 %v59 = tail call i64 @llvm.hexagon.A2.addp(i64 %v57, i64 %v58)
76 %v60 = lshr i64 %v59, 32
77 %v61 = trunc i64 %v60 to i32
78 ret i32 %v61
79 }
80
81 declare i64 @llvm.hexagon.A2.addp(i64, i64) #1
82 declare i64 @llvm.hexagon.A2.subp(i64, i64) #1
83 declare i64 @llvm.hexagon.A2.combinew(i32, i32) #1
84
85 attributes #0 = { nounwind readonly "target-cpu"="hexagonv60" "target-features"="-hvx,-long-calls" }
86 attributes #1 = { nounwind readnone }
87
88 !0 = !{!1, !1, i64 0}
89 !1 = !{!"long", !2, i64 0}
90 !2 = !{!"omnipotent char", !3, i64 0}
91 !3 = !{!"Simple C/C++ TBAA"}