Mercurial > hg > CbC > CbC_llvm
comparison test/CodeGen/X86/aes_intrinsics.ll @ 121:803732b1fca8
LLVM 5.0
author | kono |
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date | Fri, 27 Oct 2017 17:07:41 +0900 |
parents | 95c75e76d11b |
children | 3a76565eade5 |
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120:1172e4bd9c6f | 121:803732b1fca8 |
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1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+aes,-avx | FileCheck %s | 1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
2 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE | |
3 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX | |
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE | |
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX | |
2 | 6 |
3 define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) { | 7 define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) { |
4 ; CHECK: aesdec | 8 ; SSE-LABEL: test_x86_aesni_aesdec: |
9 ; SSE: # BB#0: | |
10 ; SSE-NEXT: aesdec %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xde,0xc1] | |
11 ; SSE-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
12 ; | |
13 ; AVX-LABEL: test_x86_aesni_aesdec: | |
14 ; AVX: # BB#0: | |
15 ; AVX-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xde,0xc1] | |
16 ; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
5 %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] | 17 %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] |
6 ret <2 x i64> %res | 18 ret <2 x i64> %res |
7 } | 19 } |
8 declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone | 20 declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone |
9 | 21 |
10 | 22 |
11 define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) { | 23 define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) { |
12 ; CHECK: aesdeclast | 24 ; SSE-LABEL: test_x86_aesni_aesdeclast: |
25 ; SSE: # BB#0: | |
26 ; SSE-NEXT: aesdeclast %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xdf,0xc1] | |
27 ; SSE-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
28 ; | |
29 ; AVX-LABEL: test_x86_aesni_aesdeclast: | |
30 ; AVX: # BB#0: | |
31 ; AVX-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdf,0xc1] | |
32 ; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
13 %res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] | 33 %res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] |
14 ret <2 x i64> %res | 34 ret <2 x i64> %res |
15 } | 35 } |
16 declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind readnone | 36 declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind readnone |
17 | 37 |
18 | 38 |
19 define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) { | 39 define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) { |
20 ; CHECK: aesenc | 40 ; SSE-LABEL: test_x86_aesni_aesenc: |
41 ; SSE: # BB#0: | |
42 ; SSE-NEXT: aesenc %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xdc,0xc1] | |
43 ; SSE-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
44 ; | |
45 ; AVX-LABEL: test_x86_aesni_aesenc: | |
46 ; AVX: # BB#0: | |
47 ; AVX-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdc,0xc1] | |
48 ; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
21 %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] | 49 %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] |
22 ret <2 x i64> %res | 50 ret <2 x i64> %res |
23 } | 51 } |
24 declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>) nounwind readnone | 52 declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>) nounwind readnone |
25 | 53 |
26 | 54 |
27 define <2 x i64> @test_x86_aesni_aesenclast(<2 x i64> %a0, <2 x i64> %a1) { | 55 define <2 x i64> @test_x86_aesni_aesenclast(<2 x i64> %a0, <2 x i64> %a1) { |
28 ; CHECK: aesenclast | 56 ; SSE-LABEL: test_x86_aesni_aesenclast: |
57 ; SSE: # BB#0: | |
58 ; SSE-NEXT: aesenclast %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xdd,0xc1] | |
59 ; SSE-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
60 ; | |
61 ; AVX-LABEL: test_x86_aesni_aesenclast: | |
62 ; AVX: # BB#0: | |
63 ; AVX-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdd,0xc1] | |
64 ; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
29 %res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] | 65 %res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] |
30 ret <2 x i64> %res | 66 ret <2 x i64> %res |
31 } | 67 } |
32 declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>) nounwind readnone | 68 declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>) nounwind readnone |
33 | 69 |
34 | 70 |
35 define <2 x i64> @test_x86_aesni_aesimc(<2 x i64> %a0) { | 71 define <2 x i64> @test_x86_aesni_aesimc(<2 x i64> %a0) { |
36 ; CHECK: aesimc | 72 ; SSE-LABEL: test_x86_aesni_aesimc: |
73 ; SSE: # BB#0: | |
74 ; SSE-NEXT: aesimc %xmm0, %xmm0 # encoding: [0x66,0x0f,0x38,0xdb,0xc0] | |
75 ; SSE-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
76 ; | |
77 ; AVX-LABEL: test_x86_aesni_aesimc: | |
78 ; AVX: # BB#0: | |
79 ; AVX-NEXT: vaesimc %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdb,0xc0] | |
80 ; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
37 %res = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0) ; <<2 x i64>> [#uses=1] | 81 %res = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0) ; <<2 x i64>> [#uses=1] |
38 ret <2 x i64> %res | 82 ret <2 x i64> %res |
39 } | 83 } |
40 declare <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64>) nounwind readnone | 84 declare <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64>) nounwind readnone |
41 | 85 |
42 | 86 |
43 define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) { | 87 define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) { |
44 ; CHECK: aeskeygenassist | 88 ; SSE-LABEL: test_x86_aesni_aeskeygenassist: |
89 ; SSE: # BB#0: | |
90 ; SSE-NEXT: aeskeygenassist $7, %xmm0, %xmm0 # encoding: [0x66,0x0f,0x3a,0xdf,0xc0,0x07] | |
91 ; SSE-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
92 ; | |
93 ; AVX-LABEL: test_x86_aesni_aeskeygenassist: | |
94 ; AVX: # BB#0: | |
95 ; AVX-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # encoding: [0xc4,0xe3,0x79,0xdf,0xc0,0x07] | |
96 ; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3] | |
45 %res = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7) ; <<2 x i64>> [#uses=1] | 97 %res = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7) ; <<2 x i64>> [#uses=1] |
46 ret <2 x i64> %res | 98 ret <2 x i64> %res |
47 } | 99 } |
48 declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) nounwind readnone | 100 declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) nounwind readnone |