Mercurial > hg > CbC > CbC_llvm
comparison test/Transforms/InstCombine/compare-signs.ll @ 121:803732b1fca8
LLVM 5.0
author | kono |
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date | Fri, 27 Oct 2017 17:07:41 +0900 |
parents | 1172e4bd9c6f |
children | c2174574ed3a |
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120:1172e4bd9c6f | 121:803732b1fca8 |
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py | 1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
2 ; RUN: opt -instcombine -S < %s | FileCheck %s | 2 ; RUN: opt -instcombine -S < %s | FileCheck %s |
3 ; PR5438 | 3 ; PR5438 |
4 | 4 |
5 ; TODO: This should also optimize down. | 5 ; TODO: This should also optimize down. |
6 ;define i32 @test1(i32 %a, i32 %b) nounwind readnone { | 6 define i32 @test1(i32 %a, i32 %b) nounwind readnone { |
7 ;entry: | 7 ; CHECK-LABEL: @test1( |
8 ; %0 = icmp sgt i32 %a, -1 | 8 ; CHECK-NEXT: [[T0:%.*]] = icmp sgt i32 [[A:%.*]], -1 |
9 ; %1 = icmp slt i32 %b, 0 | 9 ; CHECK-NEXT: [[T1:%.*]] = icmp slt i32 [[B:%.*]], 0 |
10 ; %2 = xor i1 %1, %0 | 10 ; CHECK-NEXT: [[T2:%.*]] = xor i1 [[T1]], [[T0]] |
11 ; %3 = zext i1 %2 to i32 | 11 ; CHECK-NEXT: [[T3:%.*]] = zext i1 [[T2]] to i32 |
12 ; ret i32 %3 | 12 ; CHECK-NEXT: ret i32 [[T3]] |
13 ;} | 13 ; |
14 %t0 = icmp sgt i32 %a, -1 | |
15 %t1 = icmp slt i32 %b, 0 | |
16 %t2 = xor i1 %t1, %t0 | |
17 %t3 = zext i1 %t2 to i32 | |
18 ret i32 %t3 | |
19 } | |
14 | 20 |
15 ; TODO: This optimizes partially but not all the way. | 21 ; TODO: This optimizes partially but not all the way. |
16 ;define i32 @test2(i32 %a, i32 %b) nounwind readnone { | 22 define i32 @test2(i32 %a, i32 %b) nounwind readnone { |
17 ;entry: | 23 ; CHECK-LABEL: @test2( |
18 ; %0 = and i32 %a, 8 | 24 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[A:%.*]], [[B:%.*]] |
19 ; %1 = and i32 %b, 8 | 25 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 3 |
20 ; %2 = icmp eq i32 %0, %1 | 26 ; CHECK-NEXT: [[DOTLOBIT:%.*]] = and i32 [[TMP2]], 1 |
21 ; %3 = zext i1 %2 to i32 | 27 ; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[DOTLOBIT]], 1 |
22 ; ret i32 %3 | 28 ; CHECK-NEXT: ret i32 [[TMP3]] |
23 ;} | 29 ; |
30 %t0 = and i32 %a, 8 | |
31 %t1 = and i32 %b, 8 | |
32 %t2 = icmp eq i32 %t0, %t1 | |
33 %t3 = zext i1 %t2 to i32 | |
34 ret i32 %t3 | |
35 } | |
24 | 36 |
25 define i32 @test3(i32 %a, i32 %b) nounwind readnone { | 37 define i32 @test3(i32 %a, i32 %b) nounwind readnone { |
26 ; CHECK-LABEL: @test3( | 38 ; CHECK-LABEL: @test3( |
27 ; CHECK-NEXT: [[T2_UNSHIFTED:%.*]] = xor i32 %a, %b | 39 ; CHECK-NEXT: [[T2_UNSHIFTED:%.*]] = xor i32 %a, %b |
28 ; CHECK-NEXT: [[T2_UNSHIFTED_LOBIT:%.*]] = lshr i32 [[T2_UNSHIFTED]], 31 | 40 ; CHECK-NEXT: [[T2_UNSHIFTED_LOBIT:%.*]] = lshr i32 [[T2_UNSHIFTED]], 31 |
32 %t0 = lshr i32 %a, 31 | 44 %t0 = lshr i32 %a, 31 |
33 %t1 = lshr i32 %b, 31 | 45 %t1 = lshr i32 %b, 31 |
34 %t2 = icmp eq i32 %t0, %t1 | 46 %t2 = icmp eq i32 %t0, %t1 |
35 %t3 = zext i1 %t2 to i32 | 47 %t3 = zext i1 %t2 to i32 |
36 ret i32 %t3 | 48 ret i32 %t3 |
49 } | |
50 | |
51 ; TODO this should optimize but doesn't due to missing vector support in InstCombiner::foldICmpEquality. | |
52 define <2 x i32> @test3vec(<2 x i32> %a, <2 x i32> %b) nounwind readnone { | |
53 ; CHECK-LABEL: @test3vec( | |
54 ; CHECK-NEXT: [[T0:%.*]] = lshr <2 x i32> [[A:%.*]], <i32 31, i32 31> | |
55 ; CHECK-NEXT: [[T1:%.*]] = lshr <2 x i32> [[B:%.*]], <i32 31, i32 31> | |
56 ; CHECK-NEXT: [[T2:%.*]] = icmp eq <2 x i32> [[T0]], [[T1]] | |
57 ; CHECK-NEXT: [[T3:%.*]] = zext <2 x i1> [[T2]] to <2 x i32> | |
58 ; CHECK-NEXT: ret <2 x i32> [[T3]] | |
59 ; | |
60 %t0 = lshr <2 x i32> %a, <i32 31, i32 31> | |
61 %t1 = lshr <2 x i32> %b, <i32 31, i32 31> | |
62 %t2 = icmp eq <2 x i32> %t0, %t1 | |
63 %t3 = zext <2 x i1> %t2 to <2 x i32> | |
64 ret <2 x i32> %t3 | |
37 } | 65 } |
38 | 66 |
39 ; Variation on @test3: checking the 2nd bit in a situation where the 5th bit | 67 ; Variation on @test3: checking the 2nd bit in a situation where the 5th bit |
40 ; is one, not zero. | 68 ; is one, not zero. |
41 define i32 @test3i(i32 %a, i32 %b) nounwind readnone { | 69 define i32 @test3i(i32 %a, i32 %b) nounwind readnone { |