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comparison test/Transforms/InstCombine/pr17827.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children c2174574ed3a
comparison
equal deleted inserted replaced
120:1172e4bd9c6f 121:803732b1fca8
45 %ashr = ashr i8 %shl, 5 45 %ashr = ashr i8 %shl, 5
46 %cmp = icmp slt i8 %ashr, 1 46 %cmp = icmp slt i8 %ashr, 1
47 ret i1 %cmp 47 ret i1 %cmp
48 } 48 }
49 49
50 ; FIXME: Vectors should fold the same way.
51 define <2 x i1> @test_shift_and_cmp_changed1_vec(<2 x i8> %p, <2 x i8> %q) { 50 define <2 x i1> @test_shift_and_cmp_changed1_vec(<2 x i8> %p, <2 x i8> %q) {
52 ; CHECK-LABEL: @test_shift_and_cmp_changed1_vec( 51 ; CHECK-LABEL: @test_shift_and_cmp_changed1_vec(
53 ; CHECK-NEXT: [[ANDP:%.*]] = and <2 x i8> %p, <i8 6, i8 6> 52 ; CHECK-NEXT: [[ANDP:%.*]] = shl <2 x i8> [[P:%.*]], <i8 5, i8 5>
54 ; CHECK-NEXT: [[ANDQ:%.*]] = and <2 x i8> %q, <i8 8, i8 8> 53 ; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[ANDP]], <i8 -64, i8 -64>
55 ; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ANDQ]], [[ANDP]] 54 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[SHL]], <i8 32, i8 32>
56 ; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i8> [[OR]], <i8 5, i8 5>
57 ; CHECK-NEXT: [[ASHR:%.*]] = ashr <2 x i8> [[SHL]], <i8 5, i8 5>
58 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[ASHR]], <i8 1, i8 1>
59 ; CHECK-NEXT: ret <2 x i1> [[CMP]] 55 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
60 ; 56 ;
61 %andp = and <2 x i8> %p, <i8 6, i8 6> 57 %andp = and <2 x i8> %p, <i8 6, i8 6>
62 %andq = and <2 x i8> %q, <i8 8, i8 8> 58 %andq = and <2 x i8> %q, <i8 8, i8 8>
63 %or = or <2 x i8> %andq, %andp 59 %or = or <2 x i8> %andq, %andp