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comparison lib/Target/Mips/MipsISelDAGToDAG.h @ 0:95c75e76d11b LLVM3.4

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
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children 54457678186b
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-1:000000000000 0:95c75e76d11b
1 //===---- MipsISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines an instruction selector for the MIPS target.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef MIPSISELDAGTODAG_H
15 #define MIPSISELDAGTODAG_H
16
17 #include "Mips.h"
18 #include "MipsSubtarget.h"
19 #include "MipsTargetMachine.h"
20 #include "llvm/CodeGen/SelectionDAGISel.h"
21
22 //===----------------------------------------------------------------------===//
23 // Instruction Selector Implementation
24 //===----------------------------------------------------------------------===//
25
26 //===----------------------------------------------------------------------===//
27 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
28 // instructions for SelectionDAG operations.
29 //===----------------------------------------------------------------------===//
30 namespace llvm {
31
32 class MipsDAGToDAGISel : public SelectionDAGISel {
33 public:
34 explicit MipsDAGToDAGISel(MipsTargetMachine &TM)
35 : SelectionDAGISel(TM), Subtarget(TM.getSubtarget<MipsSubtarget>()) {}
36
37 // Pass Name
38 virtual const char *getPassName() const {
39 return "MIPS DAG->DAG Pattern Instruction Selection";
40 }
41
42 virtual bool runOnMachineFunction(MachineFunction &MF);
43
44 protected:
45 SDNode *getGlobalBaseReg();
46
47 /// Keep a pointer to the MipsSubtarget around so that we can make the right
48 /// decision when generating code for different targets.
49 const MipsSubtarget &Subtarget;
50
51 private:
52 // Include the pieces autogenerated from the target description.
53 #include "MipsGenDAGISel.inc"
54
55 // Complex Pattern.
56 /// (reg + imm).
57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
59
60 // Complex Pattern.
61 /// (reg + reg).
62 virtual bool selectAddrRegReg(SDValue Addr, SDValue &Base,
63 SDValue &Offset) const;
64
65 /// Fall back on this function if all else fails.
66 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
67 SDValue &Offset) const;
68
69 /// Match integer address pattern.
70 virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
71 SDValue &Offset) const;
72
73 virtual bool selectIntAddrMM(SDValue Addr, SDValue &Base,
74 SDValue &Offset) const;
75
76 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
77 SDValue &Offset, SDValue &Alias);
78
79 /// \brief Select constant vector splats.
80 virtual bool selectVSplat(SDNode *N, APInt &Imm) const;
81 /// \brief Select constant vector splats whose value fits in a uimm1.
82 virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const;
83 /// \brief Select constant vector splats whose value fits in a uimm2.
84 virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const;
85 /// \brief Select constant vector splats whose value fits in a uimm3.
86 virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const;
87 /// \brief Select constant vector splats whose value fits in a uimm4.
88 virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const;
89 /// \brief Select constant vector splats whose value fits in a uimm5.
90 virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const;
91 /// \brief Select constant vector splats whose value fits in a uimm6.
92 virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const;
93 /// \brief Select constant vector splats whose value fits in a uimm8.
94 virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const;
95 /// \brief Select constant vector splats whose value fits in a simm5.
96 virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const;
97 /// \brief Select constant vector splats whose value is a power of 2.
98 virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const;
99 /// \brief Select constant vector splats whose value is the inverse of a
100 /// power of 2.
101 virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const;
102 /// \brief Select constant vector splats whose value is a run of set bits
103 /// ending at the most significant bit
104 virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const;
105 /// \brief Select constant vector splats whose value is a run of set bits
106 /// starting at bit zero.
107 virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const;
108
109 virtual SDNode *Select(SDNode *N);
110
111 virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0;
112
113 // getImm - Return a target constant with the specified value.
114 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
115 return CurDAG->getTargetConstant(Imm, Node->getValueType(0));
116 }
117
118 virtual void processFunctionAfterISel(MachineFunction &MF) = 0;
119
120 virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
121 char ConstraintCode,
122 std::vector<SDValue> &OutOps);
123 };
124
125 /// createMipsISelDag - This pass converts a legalized DAG into a
126 /// MIPS-specific DAG, ready for instruction scheduling.
127 FunctionPass *createMipsISelDag(MipsTargetMachine &TM);
128
129 }
130
131 #endif