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comparison test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll @ 0:95c75e76d11b LLVM3.4

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
parents
children afa8332a0e37
comparison
equal deleted inserted replaced
-1:000000000000 0:95c75e76d11b
1 ; RUN: llc -O3 < %s | FileCheck %s
2 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
3 target triple = "thumbv7-apple-darwin10"
4
5 ; This test should not produce any spills, even when tail duplication creates lots of phi nodes.
6 ; CHECK-NOT: push
7 ; CHECK-NOT: pop
8 ; CHECK: bx lr
9
10 @codetable.2928 = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5]
11 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
12
13 define i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
14 entry:
15 %0 = load i8* %opcodes, align 1 ; <i8> [#uses=1]
16 %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
17 %2 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %1 ; <i8**> [#uses=1]
18 br label %bb
19
20 bb: ; preds = %bb.backedge, %entry
21 %indvar = phi i32 [ %phitmp, %bb.backedge ], [ 1, %entry ] ; <i32> [#uses=2]
22 %gotovar.22.0.in = phi i8** [ %gotovar.22.0.in.be, %bb.backedge ], [ %2, %entry ] ; <i8**> [#uses=1]
23 %result.0 = phi i32 [ %result.0.be, %bb.backedge ], [ 0, %entry ] ; <i32> [#uses=6]
24 %opcodes_addr.0 = getelementptr i8* %opcodes, i32 %indvar ; <i8*> [#uses=4]
25 %gotovar.22.0 = load i8** %gotovar.22.0.in, align 4 ; <i8*> [#uses=1]
26 indirectbr i8* %gotovar.22.0, [label %RETURN, label %INCREMENT, label %DECREMENT, label %DOUBLE, label %SWAPWORD]
27
28 RETURN: ; preds = %bb
29 ret i32 %result.0
30
31 INCREMENT: ; preds = %bb
32 %3 = add nsw i32 %result.0, 1 ; <i32> [#uses=1]
33 %4 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
34 %5 = zext i8 %4 to i32 ; <i32> [#uses=1]
35 %6 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %5 ; <i8**> [#uses=1]
36 br label %bb.backedge
37
38 bb.backedge: ; preds = %SWAPWORD, %DOUBLE, %DECREMENT, %INCREMENT
39 %gotovar.22.0.in.be = phi i8** [ %20, %SWAPWORD ], [ %14, %DOUBLE ], [ %10, %DECREMENT ], [ %6, %INCREMENT ] ; <i8**> [#uses=1]
40 %result.0.be = phi i32 [ %17, %SWAPWORD ], [ %11, %DOUBLE ], [ %7, %DECREMENT ], [ %3, %INCREMENT ] ; <i32> [#uses=1]
41 %phitmp = add i32 %indvar, 1 ; <i32> [#uses=1]
42 br label %bb
43
44 DECREMENT: ; preds = %bb
45 %7 = add i32 %result.0, -1 ; <i32> [#uses=1]
46 %8 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
47 %9 = zext i8 %8 to i32 ; <i32> [#uses=1]
48 %10 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %9 ; <i8**> [#uses=1]
49 br label %bb.backedge
50
51 DOUBLE: ; preds = %bb
52 %11 = shl i32 %result.0, 1 ; <i32> [#uses=1]
53 %12 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
54 %13 = zext i8 %12 to i32 ; <i32> [#uses=1]
55 %14 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %13 ; <i8**> [#uses=1]
56 br label %bb.backedge
57
58 SWAPWORD: ; preds = %bb
59 %15 = shl i32 %result.0, 16 ; <i32> [#uses=1]
60 %16 = ashr i32 %result.0, 16 ; <i32> [#uses=1]
61 %17 = or i32 %15, %16 ; <i32> [#uses=1]
62 %18 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
63 %19 = zext i8 %18 to i32 ; <i32> [#uses=1]
64 %20 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %19 ; <i8**> [#uses=1]
65 br label %bb.backedge
66 }