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comparison test/CodeGen/X86/sse1.ll @ 0:95c75e76d11b LLVM3.4

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
parents
children 54457678186b
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-1:000000000000 0:95c75e76d11b
1 ; Tests for SSE1 and below, without SSE2+.
2 ; RUN: llc < %s -march=x86 -mcpu=pentium3 -O3 | FileCheck %s
3 ; RUN: llc < %s -march=x86-64 -mattr=-sse2,+sse -O3 | FileCheck %s
4
5 define <8 x i16> @test1(<8 x i32> %a) nounwind {
6 ; CHECK: test1
7 ret <8 x i16> zeroinitializer
8 }
9
10 define <8 x i16> @test2(<8 x i32> %a) nounwind {
11 ; CHECK: test2
12 %c = trunc <8 x i32> %a to <8 x i16> ; <<8 x i16>> [#uses=1]
13 ret <8 x i16> %c
14 }
15
16 ; PR7993
17 ;define <4 x i32> @test3(<4 x i16> %a) nounwind {
18 ; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
19 ; ret <4 x i32> %c
20 ;}
21
22 ; This should not emit shuffles to populate the top 2 elements of the 4-element
23 ; vector that this ends up returning.
24 ; rdar://8368414
25 define <2 x float> @test4(<2 x float> %A, <2 x float> %B) nounwind {
26 entry:
27 %tmp7 = extractelement <2 x float> %A, i32 0
28 %tmp5 = extractelement <2 x float> %A, i32 1
29 %tmp3 = extractelement <2 x float> %B, i32 0
30 %tmp1 = extractelement <2 x float> %B, i32 1
31 %add.r = fadd float %tmp7, %tmp3
32 %add.i = fsub float %tmp5, %tmp1
33 %tmp11 = insertelement <2 x float> undef, float %add.r, i32 0
34 %tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
35 ret <2 x float> %tmp9
36 ; CHECK-LABEL: test4:
37 ; CHECK-NOT: shufps $16
38 ; CHECK: shufps $1,
39 ; CHECK-NOT: shufps $16
40 ; CHECK: shufps $1,
41 ; CHECK-NOT: shufps $16
42 ; CHECK: unpcklps
43 ; CHECK-NOT: shufps $16
44 ; CHECK: ret
45 }