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comparison test/CodeGen/X86/sse4a.ll @ 0:95c75e76d11b LLVM3.4

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
parents
children 60c9769439b8
comparison
equal deleted inserted replaced
-1:000000000000 0:95c75e76d11b
1 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4a | FileCheck %s
2
3 define void @test1(i8* %p, <4 x float> %a) nounwind optsize ssp {
4 ; CHECK-LABEL: test1:
5 ; CHECK: movntss
6 tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind
7 ret void
8 }
9
10 declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
11
12 define void @test2(i8* %p, <2 x double> %a) nounwind optsize ssp {
13 ; CHECK-LABEL: test2:
14 ; CHECK: movntsd
15 tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind
16 ret void
17 }
18
19 declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
20
21 define <2 x i64> @test3(<2 x i64> %x) nounwind uwtable ssp {
22 ; CHECK-LABEL: test3:
23 ; CHECK: extrq
24 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2)
25 ret <2 x i64> %1
26 }
27
28 declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind
29
30 define <2 x i64> @test4(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
31 ; CHECK-LABEL: test4:
32 ; CHECK: extrq
33 %1 = bitcast <2 x i64> %y to <16 x i8>
34 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %1) nounwind
35 ret <2 x i64> %2
36 }
37
38 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
39
40 define <2 x i64> @test5(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
41 ; CHECK-LABEL: test5:
42 ; CHECK: insertq
43 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> %y, i8 5, i8 6)
44 ret <2 x i64> %1
45 }
46
47 declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind
48
49 define <2 x i64> @test6(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
50 ; CHECK-LABEL: test6:
51 ; CHECK: insertq
52 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
53 ret <2 x i64> %1
54 }
55
56 declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind