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comparison test/CodeGen/X86/vec_sdiv_to_shift.ll @ 0:95c75e76d11b LLVM3.4

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
parents
children afa8332a0e37
comparison
equal deleted inserted replaced
-1:000000000000 0:95c75e76d11b
1 ; RUN: llc < %s -march=x86-64 -mcpu=penryn -mattr=+avx2 | FileCheck %s
2
3
4 define <8 x i16> @sdiv_vec8x16(<8 x i16> %var) {
5 entry:
6 ; CHECK: sdiv_vec8x16
7 ; CHECK: psraw $15
8 ; CHECK: vpsrlw $11
9 ; CHECK: vpaddw
10 ; CHECK: vpsraw $5
11 ; CHECK: ret
12 %0 = sdiv <8 x i16> %var, <i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32>
13 ret <8 x i16> %0
14 }
15
16 define <4 x i32> @sdiv_zero(<4 x i32> %var) {
17 entry:
18 ; CHECK: sdiv_zero
19 ; CHECK-NOT: sra
20 ; CHECK: ret
21 %0 = sdiv <4 x i32> %var, <i32 0, i32 0, i32 0, i32 0>
22 ret <4 x i32> %0
23 }
24
25 define <4 x i32> @sdiv_vec4x32(<4 x i32> %var) {
26 entry:
27 ; CHECK: sdiv_vec4x32
28 ; CHECK: vpsrad $31
29 ; CHECK: vpsrld $28
30 ; CHECK: vpaddd
31 ; CHECK: vpsrad $4
32 ; CHECK: ret
33 %0 = sdiv <4 x i32> %var, <i32 16, i32 16, i32 16, i32 16>
34 ret <4 x i32> %0
35 }
36
37 define <4 x i32> @sdiv_negative(<4 x i32> %var) {
38 entry:
39 ; CHECK: sdiv_negative
40 ; CHECK: vpsrad $31
41 ; CHECK: vpsrld $28
42 ; CHECK: vpaddd
43 ; CHECK: vpsrad $4
44 ; CHECK: vpsubd
45 ; CHECK: ret
46 %0 = sdiv <4 x i32> %var, <i32 -16, i32 -16, i32 -16, i32 -16>
47 ret <4 x i32> %0
48 }
49
50 define <8 x i32> @sdiv8x32(<8 x i32> %var) {
51 entry:
52 ; CHECK: sdiv8x32
53 ; CHECK: vpsrad $31
54 ; CHECK: vpsrld $26
55 ; CHECK: vpaddd
56 ; CHECK: vpsrad $6
57 ; CHECK: ret
58 %0 = sdiv <8 x i32> %var, <i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64>
59 ret <8 x i32> %0
60 }
61
62 define <16 x i16> @sdiv16x16(<16 x i16> %var) {
63 entry:
64 ; CHECK: sdiv16x16
65 ; CHECK: vpsraw $15
66 ; CHECK: vpsrlw $14
67 ; CHECK: vpaddw
68 ; CHECK: vpsraw $2
69 ; CHECK: ret
70 %a0 = sdiv <16 x i16> %var, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
71 ret <16 x i16> %a0
72 }
73
74 ; CHECK: sdiv_non_splat
75 ; CHECK: idivl
76 ; CHECK: ret
77 define <4 x i32> @sdiv_non_splat(<4 x i32> %x) {
78 %y = sdiv <4 x i32> %x, <i32 2, i32 0, i32 0, i32 0>
79 ret <4 x i32> %y
80 }